Message-ID: <2eecd3e7-8a13-9068-6dbc-a1f105584207@linux.intel.com>
Date:   Sun, 3 May 2020 17:17:52 -0700
From:   "Dey, Megha" <megha.dey@...ux.intel.com>
To:     Thomas Gleixner <tglx@...utronix.de>,
        Dave Jiang <dave.jiang@...el.com>, vkoul@...nel.org,
        maz@...nel.org, bhelgaas@...gle.com, rafael@...nel.org,
        gregkh@...uxfoundation.org, hpa@...or.com,
        alex.williamson@...hat.com, jacob.jun.pan@...el.com,
        ashok.raj@...el.com, jgg@...lanox.com, yi.l.liu@...el.com,
        baolu.lu@...el.com, kevin.tian@...el.com, sanjay.k.kumar@...el.com,
        tony.luck@...el.com, jing.lin@...el.com, dan.j.williams@...el.com,
        kwankhede@...dia.com, eric.auger@...hat.com, parav@...lanox.com
Cc:     dmaengine@...r.kernel.org, linux-kernel@...r.kernel.org,
        x86@...nel.org, linux-pci@...r.kernel.org, kvm@...r.kernel.org
Subject: Re: [PATCH RFC 06/15] ims-msi: Enable IMS interrupts

Hi Thomas,

On 4/25/2020 3:13 PM, Thomas Gleixner wrote:
> Dave Jiang <dave.jiang@...el.com> writes:
>>   
>> +struct irq_domain *dev_get_ims_domain(struct device *dev)
>> +{
>> +	struct irq_alloc_info info;
>> +
>> +	if (dev_is_mdev(dev))
>> +		dev = mdev_to_parent(dev);
>> +
>> +	init_irq_alloc_info(&info, NULL);
>> +	info.type = X86_IRQ_ALLOC_TYPE_IMS;
> 
> So all IMS capabale devices run on X86? I thought these things are PCIe
> cards which can be plugged into any platform which supports PCIe.

No, IMS is architecture independent.

and yes they are PCIe cards which can be plugged into any platform which 
supports PCIe.
> 
>> +	info.dev = dev;
>> +
>> +	return irq_remapping_get_irq_domain(&info);
>> +}
>> +
>>   static struct msi_domain_ops dev_ims_domain_ops = {
>>   	.get_hwirq	= dev_ims_get_hwirq,
>>   	.msi_prepare	= dev_ims_prepare,
>> diff --git a/drivers/base/platform-msi.c b/drivers/base/platform-msi.c
>> index 6d8840db4a85..204ce8041c17 100644
>> --- a/drivers/base/platform-msi.c
>> +++ b/drivers/base/platform-msi.c
>> @@ -118,6 +118,8 @@ static void platform_msi_free_descs(struct device *dev, int base, int nvec,
>>   			kfree(platform_msi_group);
>>   		}
>>   	}
>> +
>> +	dev->platform_msi_type = 0;
> 
> I can clearly see the advantage of using '0' over 'NOT_PLAT_MSI'
> here. '0' is definitely more intuitive.
> 

Hmm, this will no longer be needed in the next version of patches.
>>   }
>>   
>>   static int platform_msi_alloc_descs_with_irq(struct device *dev, int virq,
>> @@ -205,18 +207,22 @@ platform_msi_alloc_priv_data(struct device *dev, unsigned int nvec,
>>   	 * accordingly (which would impact the max number of MSI
>>   	 * capable devices).
>>   	 */
>> -	if (!dev->msi_domain || !platform_ops->write_msg || !nvec ||
>> -	    nvec > MAX_DEV_MSIS)
>> +	if (!platform_ops->write_msg || !nvec || nvec > MAX_DEV_MSIS)
>>   		return ERR_PTR(-EINVAL);
>> -	if (dev->msi_domain->bus_token != DOMAIN_BUS_PLATFORM_MSI) {
>> -		dev_err(dev, "Incompatible msi_domain, giving up\n");
>> -		return ERR_PTR(-EINVAL);
>> -	}
>> +	if (dev->platform_msi_type == GEN_PLAT_MSI) {
>> +		if (!dev->msi_domain)
>> +			return ERR_PTR(-EINVAL);
>> +
>> +		if (dev->msi_domain->bus_token != DOMAIN_BUS_PLATFORM_MSI) {
>> +			dev_err(dev, "Incompatible msi_domain, giving up\n");
>> +			return ERR_PTR(-EINVAL);
>> +		}
>>   
>> -	/* Already had a helping of MSI? Greed... */
>> -	if (!list_empty(platform_msi_current_group_entry_list(dev)))
>> -		return ERR_PTR(-EBUSY);
>> +		/* Already had a helping of MSI? Greed... */
>> +		if (!list_empty(platform_msi_current_group_entry_list(dev)))
>> +			return ERR_PTR(-EBUSY);
>> +	}
>>   
>>   	datap = kzalloc(sizeof(*datap), GFP_KERNEL);
>>   	if (!datap)
>> @@ -254,6 +260,7 @@ static void platform_msi_free_priv_data(struct platform_msi_priv_data *data)
>>   int platform_msi_domain_alloc_irqs(struct device *dev, unsigned int nvec,
>>   				   const struct platform_msi_ops *platform_ops)
>>   {
>> +	dev->platform_msi_type = GEN_PLAT_MSI;
>>   	return platform_msi_domain_alloc_irqs_group(dev, nvec, platform_ops,
>>   									NULL);
>>   }
>> @@ -265,12 +272,18 @@ int platform_msi_domain_alloc_irqs_group(struct device *dev, unsigned int nvec,
>>   {
>>   	struct platform_msi_group_entry *platform_msi_group;
>>   	struct platform_msi_priv_data *priv_data;
>> +	struct irq_domain *domain;
>>   	int err;
>>   
>> -	dev->platform_msi_type = GEN_PLAT_MSI;
> 
> Groan. If you move the type assignment to the caller then do so in a
> separate patch. These all in one combo changes are simply not reviewable
> without getting nuts.

sure, makes sense to add it as a separate patch.
> 
>> -	if (group_id)
>> +	if (!dev->platform_msi_type) {
> 
> That's really consistent. If the caller does not store a type upfront
> then it becomes IMS automagically. Can you pretty please stop to think
> that this IMS stuff is the center of the universe? To be clear, it's
> just another variant of half thought out hardware design fail as all the
> other stuff we already have to support.

well, as we have recently concluded, IMS is merely an extension and 
improvements over the already existing platform-msi. So well, it is not 
the center of the universe indeed.

> 
> Abusing dev->platform_msi_type to decide about the nature of the call
> and then decide that anything which does not set it upfront is IMS is
> really future proof.

Have to think of something else indeed <scratching my head>

> 
>>   		*group_id = ++dev->group_id;
>> +		dev->platform_msi_type = IMS;
> 
> Oh a new type name 'IMS'. Well suited into the naming scheme.

coming up with a coherent naming scheme in the next version of patches.
> 
>> +		domain = dev_get_ims_domain(dev);
> 
> No. This is completely inconsistent again and a blatant violation of
> layering.

yes, i earlier thought what differentiates the already existing 
platform-msi from IMS is that IMS has to have IR enabled and thus we 
need  to have some way to finding the IRQ domain corresponding to that 
interrupt remapping unit. Now that this theory is not true, we would not 
be needing this call after all.

> 
> Thanks,
> 
>          tglx
> 

Powered by blists - more mailing lists