[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <fb9f513c-786c-af15-693d-3d76eb74fc35@oracle.com>
Date: Wed, 6 May 2020 14:11:45 +0200
From: Alexandre Chartre <alexandre.chartre@...cle.com>
To: Thomas Gleixner <tglx@...utronix.de>,
LKML <linux-kernel@...r.kernel.org>
Cc: x86@...nel.org, "Paul E. McKenney" <paulmck@...nel.org>,
Andy Lutomirski <luto@...nel.org>,
Frederic Weisbecker <frederic@...nel.org>,
Paolo Bonzini <pbonzini@...hat.com>,
Sean Christopherson <sean.j.christopherson@...el.com>,
Masami Hiramatsu <mhiramat@...nel.org>,
Petr Mladek <pmladek@...e.com>,
Steven Rostedt <rostedt@...dmis.org>,
Joel Fernandes <joel@...lfernandes.org>,
Boris Ostrovsky <boris.ostrovsky@...cle.com>,
Juergen Gross <jgross@...e.com>,
Brian Gerst <brgerst@...il.com>,
Mathieu Desnoyers <mathieu.desnoyers@...icios.com>,
Josh Poimboeuf <jpoimboe@...hat.com>,
Will Deacon <will@...nel.org>,
"Peter Zijlstra (Intel)" <peterz@...radead.org>
Subject: Re: [patch V4 part 1 02/36] x86/hw_breakpoint: Prevent data
breakpoints on cpu_entry_area
On 5/5/20 3:16 PM, Thomas Gleixner wrote:
> From: Andy Lutomirski <luto@...nel.org>
>
> A data breakpoint near the top of an IST stack will cause unresoverable
typo: unresoverable -> unrecoverable
> recursion. A data breakpoint on the GDT, IDT, or TSS is terrifying.
> Prevent either of these from happening.
>
> Co-developed-by: Peter Zijlstra <peterz@...radead.org>
> Signed-off-by: Andy Lutomirski <luto@...nel.org>
> Signed-off-by: Peter Zijlstra (Intel) <peterz@...radead.org>
> Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
> ---
> arch/x86/kernel/hw_breakpoint.c | 25 +++++++++++++++++++++++++
> 1 file changed, 25 insertions(+)
Reviewed-by: Alexandre Chartre <alexandre.chartre@...cle.com>
alex.
> --- a/arch/x86/kernel/hw_breakpoint.c
> +++ b/arch/x86/kernel/hw_breakpoint.c
> @@ -227,10 +227,35 @@ int arch_check_bp_in_kernelspace(struct
> return (va >= TASK_SIZE_MAX) || ((va + len - 1) >= TASK_SIZE_MAX);
> }
>
> +/*
> + * Checks whether the range from addr to end, inclusive, overlaps the CPU
> + * entry area range.
> + */
> +static inline bool within_cpu_entry_area(unsigned long addr, unsigned long end)
> +{
> + return end >= CPU_ENTRY_AREA_PER_CPU &&
> + addr < (CPU_ENTRY_AREA_PER_CPU + CPU_ENTRY_AREA_TOTAL_SIZE);
> +}
> +
> static int arch_build_bp_info(struct perf_event *bp,
> const struct perf_event_attr *attr,
> struct arch_hw_breakpoint *hw)
> {
> + unsigned long bp_end;
> +
> + bp_end = attr->bp_addr + attr->bp_len - 1;
> + if (bp_end < attr->bp_addr)
> + return -EINVAL;
> +
> + /*
> + * Prevent any breakpoint of any type that overlaps the
> + * cpu_entry_area. This protects the IST stacks and also
> + * reduces the chance that we ever find out what happens if
> + * there's a data breakpoint on the GDT, IDT, or TSS.
> + */
> + if (within_cpu_entry_area(attr->bp_addr, bp_end))
> + return -EINVAL;
> +
> hw->address = attr->bp_addr;
> hw->mask = 0;
>
>
Powered by blists - more mailing lists