linux-kernel - Re: [PATCH 3/3] x86/apic: Convert the TSC deadline timer matching to steppings macro

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Message-ID: <20200506150042.GA2961@mtg-dev.jf.intel.com>
Date:   Wed, 6 May 2020 08:00:42 -0700
From:   mark gross <mgross@...ux.intel.com>
To:     Borislav Petkov <bp@...en8.de>
Cc:     X86 ML <x86@...nel.org>, LKML <linux-kernel@...r.kernel.org>,
        Peter Zijlstra <peterz@...radead.org>
Subject: Re: [PATCH 3/3] x86/apic: Convert the TSC deadline timer matching to
 steppings macro

Reviewed-by: Mark Gross <mgross.linux.intel.com>

On Wed, May 06, 2020 at 09:15:16AM +0200, Borislav Petkov wrote:
> From: Borislav Petkov <bp@...e.de>
> 
> ... and get rid of the function pointers which would spit out the
> microcode revision based on the CPU stepping.
> 
> Signed-off-by: Borislav Petkov <bp@...e.de>
> Cc: Peter Zijlstra (Intel) <peterz@...radead.org>
> ---
>  arch/x86/kernel/apic/apic.c | 57 ++++++++-----------------------------
>  1 file changed, 12 insertions(+), 45 deletions(-)
> 
> diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
> index e53dda210cd7..4b1d31be50b4 100644
> --- a/arch/x86/kernel/apic/apic.c
> +++ b/arch/x86/kernel/apic/apic.c
> @@ -544,46 +544,20 @@ static struct clock_event_device lapic_clockevent = {
>  };
>  static DEFINE_PER_CPU(struct clock_event_device, lapic_events);
>  
> -static __init u32 hsx_deadline_rev(void)
> -{
> -	switch (boot_cpu_data.x86_stepping) {
> -	case 0x02: return 0x3a; /* EP */
> -	case 0x04: return 0x0f; /* EX */
> -	}
> -
> -	return ~0U;
> -}
> -
> -static __init u32 bdx_deadline_rev(void)
> -{
> -	switch (boot_cpu_data.x86_stepping) {
> -	case 0x02: return 0x00000011;
> -	case 0x03: return 0x0700000e;
> -	case 0x04: return 0x0f00000c;
> -	case 0x05: return 0x0e000003;
> -	}
> -
> -	return ~0U;
> -}
> -
> -static __init u32 skx_deadline_rev(void)
> -{
> -	switch (boot_cpu_data.x86_stepping) {
> -	case 0x03: return 0x01000136;
> -	case 0x04: return 0x02000014;
> -	}
> +static const struct x86_cpu_id deadline_match[] __initconst = {
> +	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(HASWELL_X, X86_STEPPINGS(0x2, 0x2), 0x3a), /* EP */
> +	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(HASWELL_X, X86_STEPPINGS(0x4, 0x4), 0x0f), /* EX */
>  
> -	if (boot_cpu_data.x86_stepping > 4)
> -		return 0;
> +	X86_MATCH_INTEL_FAM6_MODEL( BROADWELL_X,	0x0b000020),
>  
> -	return ~0U;
> -}
> +	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(BROADWELL_D, X86_STEPPINGS(0x2, 0x2), 0x00000011),
> +	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(BROADWELL_D, X86_STEPPINGS(0x3, 0x3), 0x0700000e),
> +	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(BROADWELL_D, X86_STEPPINGS(0x4, 0x4), 0x0f00000c),
> +	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(BROADWELL_D, X86_STEPPINGS(0x5, 0x5), 0x0e000003),
>  
> -static const struct x86_cpu_id deadline_match[] __initconst = {
> -	X86_MATCH_INTEL_FAM6_MODEL( HASWELL_X,		&hsx_deadline_rev),
> -	X86_MATCH_INTEL_FAM6_MODEL( BROADWELL_X,	0x0b000020),
> -	X86_MATCH_INTEL_FAM6_MODEL( BROADWELL_D,	&bdx_deadline_rev),
> -	X86_MATCH_INTEL_FAM6_MODEL( SKYLAKE_X,		&skx_deadline_rev),
> +	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SKYLAKE_X, X86_STEPPINGS(0x3, 0x3), 0x01000136),
> +	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SKYLAKE_X, X86_STEPPINGS(0x4, 0x4), 0x02000014),
> +	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SKYLAKE_X, X86_STEPPINGS(0x5, 0xf), 0),
>  
>  	X86_MATCH_INTEL_FAM6_MODEL( HASWELL,		0x22),
>  	X86_MATCH_INTEL_FAM6_MODEL( HASWELL_L,		0x20),
> @@ -615,14 +589,7 @@ static __init bool apic_validate_deadline_timer(void)
>  	if (!m)
>  		return true;
>  
> -	/*
> -	 * Function pointers will have the MSB set due to address layout,
> -	 * immediate revisions will not.
> -	 */
> -	if ((long)m->driver_data < 0)
> -		rev = ((u32 (*)(void))(m->driver_data))();
> -	else
> -		rev = (u32)m->driver_data;
> +	rev = (u32)m->driver_data;
>  
>  	if (boot_cpu_data.microcode >= rev)
>  		return true;
> -- 
> 2.21.0
>