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Message-Id: <20200507201544.43432-1-james.quinlan@broadcom.com>
Date: Thu, 7 May 2020 16:15:39 -0400
From: Jim Quinlan <james.quinlan@...adcom.com>
To: james.quinlan@...adcom.com
Cc: Andrew Murray <amurray@...goodpenguin.co.uk>,
bcm-kernel-feedback-list@...adcom.com (open list:BROADCOM
BCM2711/BCM2835 ARM ARCHITECTURE),
devicetree@...r.kernel.org (open list:OPEN FIRMWARE AND FLATTENED
DEVICE TREE BINDINGS), Jeremy Linton <jeremy.linton@....com>,
linux-arm-kernel@...ts.infradead.org (moderated list:BROADCOM
BCM2711/BCM2835 ARM ARCHITECTURE),
linux-kernel@...r.kernel.org (open list),
linux-pci@...r.kernel.org (open list:PCI NATIVE HOST BRIDGE AND
ENDPOINT DRIVERS),
linux-rpi-kernel@...ts.infradead.org (moderated list:BROADCOM
BCM2711/BCM2835 ARM ARCHITECTURE),
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Nicolas Saenz Julienne <nsaenzjulienne@...e.de>,
Rob Herring <robh@...nel.org>
Subject: [PATCH v3 0/4] PCI: brcmstb: Some minor fixes/features
v3 -- A change was submitted to [1] to make 'aspm-no-l0s' a general
property for PCIe devices. As such, the STB PCIe YAML file
merely notes that it may be used.
v2 -- Dropped commit concerning CRS.
-- Chanded new prop 'brcm,aspm-en-l0s' to 'aspm-no-l0s'.
-- Capitalize first letter in commit subject line; spelling.
v1 -- original
[1] https://github.com/devicetree-org/dt-schema/blob/master/schemas/pci/pci-bus.yaml
Jim Quinlan (4):
PCI: brcmstb: Don't clk_put() a managed clock
PCI: brcmstb: Fix window register offset from 4 to 8
dt-bindings: PCI: brcmstb: New prop 'aspm-no-l0s'
PCI: brcmstb: Disable L0s component of ASPM if requested
.../bindings/pci/brcm,stb-pcie.yaml | 2 ++
drivers/pci/controller/pcie-brcmstb.c | 19 +++++++++++++++----
2 files changed, 17 insertions(+), 4 deletions(-)
--
2.17.1
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