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Message-ID: <AM6PR04MB49662BE27D52DC539B615B9180A50@AM6PR04MB4966.eurprd04.prod.outlook.com>
Date: Thu, 7 May 2020 06:59:58 +0000
From: Aisheng Dong <aisheng.dong@....com>
To: Peng Fan <peng.fan@....com>,
"shawnguo@...nel.org" <shawnguo@...nel.org>,
"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
Leonard Crestez <leonard.crestez@....com>,
Abel Vesa <abel.vesa@....com>
CC: "kernel@...gutronix.de" <kernel@...gutronix.de>,
"festevam@...il.com" <festevam@...il.com>,
dl-linux-imx <linux-imx@....com>,
Anson Huang <anson.huang@....com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Subject: RE: [PATCH V3 10/10] clk: imx8mp: mark memrepair clock as critical
> From: Peng Fan <peng.fan@....com>
> Sent: Thursday, May 7, 2020 1:56 PM
>
> If memrepair root clock in CCM is disabled, the memory repair logic in HDMIMIX
> can’t work. So let's mark it as critical clock.
A small question here:
Is this clock critical for the whole system or only for HDMIMIX?
What if HDMIIX is not enabled?
Regards
Aisheng
>
> Reviewed-by: Leonard Crestez <leonard.crestez@....com>
> Signed-off-by: Peng Fan <peng.fan@....com>
> ---
> drivers/clk/imx/clk-imx8mp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c index
> b4d9db9d5bf1..a7c59d7a40de 100644
> --- a/drivers/clk/imx/clk-imx8mp.c
> +++ b/drivers/clk/imx/clk-imx8mp.c
> @@ -590,7 +590,7 @@ static int imx8mp_clocks_probe(struct platform_device
> *pdev)
> hws[IMX8MP_CLK_VPU_G2] = imx8m_clk_hw_composite("vpu_g2",
> imx8mp_vpu_g2_sels, ccm_base + 0xa180);
> hws[IMX8MP_CLK_CAN1] = imx8m_clk_hw_composite("can1",
> imx8mp_can1_sels, ccm_base + 0xa200);
> hws[IMX8MP_CLK_CAN2] = imx8m_clk_hw_composite("can2",
> imx8mp_can2_sels, ccm_base + 0xa280);
> - hws[IMX8MP_CLK_MEMREPAIR] =
> imx8m_clk_hw_composite("memrepair", imx8mp_memrepair_sels, ccm_base +
> 0xa300);
> + hws[IMX8MP_CLK_MEMREPAIR] =
> +imx8m_clk_hw_composite_critical("memrepair", imx8mp_memrepair_sels,
> +ccm_base + 0xa300);
> hws[IMX8MP_CLK_PCIE_PHY] = imx8m_clk_hw_composite("pcie_phy",
> imx8mp_pcie_phy_sels, ccm_base + 0xa380);
> hws[IMX8MP_CLK_PCIE_AUX] = imx8m_clk_hw_composite("pcie_aux",
> imx8mp_pcie_aux_sels, ccm_base + 0xa400);
> hws[IMX8MP_CLK_I2C5] = imx8m_clk_hw_composite("i2c5",
> imx8mp_i2c5_sels, ccm_base + 0xa480);
> --
> 2.16.4
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