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Message-ID: <20200507111735.GF11616@alpha.franken.de>
Date: Thu, 7 May 2020 13:17:35 +0200
From: Thomas Bogendoerfer <tsbogend@...ha.franken.de>
To: Sergey.Semin@...kalelectronics.ru
Cc: Serge Semin <fancer.lancer@...il.com>,
Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>,
Paul Burton <paulburton@...nel.org>,
Ralf Baechle <ralf@...ux-mips.org>,
Arnd Bergmann <arnd@...db.de>,
Rob Herring <robh+dt@...nel.org>, linux-pm@...r.kernel.org,
devicetree@...r.kernel.org, Jiaxun Yang <jiaxun.yang@...goat.com>,
Alexander Lobakin <alobakin@...nk.ru>,
Huacai Chen <chenhc@...ote.com>,
Cedric Hombourger <Cedric_Hombourger@...tor.com>,
René van Dorst <opensource@...rst.com>,
Ard Biesheuvel <ardb@...nel.org>, Jessica Yu <jeyu@...nel.org>,
Masahiro Yamada <masahiroy@...nel.org>,
linux-mips@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 07/20] mips: Add MIPS Warrior P5600 support
On Wed, May 06, 2020 at 08:42:25PM +0300, Sergey.Semin@...kalelectronics.ru wrote:
>
> +config CPU_P5600
> + bool "MIPS Warrior P5600"
> + depends on SYS_HAS_CPU_P5600
> + select CPU_HAS_PREFETCH
> + select CPU_SUPPORTS_32BIT_KERNEL
> + select CPU_SUPPORTS_HIGHMEM
> + select CPU_SUPPORTS_MSA
> + select CPU_SUPPORTS_UNCACHED_ACCELERATED
> + select CPU_SUPPORTS_CPUFREQ
> + select CPU_MIPSR2_IRQ_VI
> + select CPU_MIPSR2_IRQ_EI
> + select HAVE_KVM
> + select MIPS_O32_FP64_SUPPORT
> + help
> + Choose this option to build a kernel for MIPS Warrior P5600 CPU.
> + It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
> + MMU with two-levels TLB, UCA, MSA, MDU core level features and system
> + level features like up to six P5600 calculation cores, CM2 with L2
> + cache, IOCU/IOMMU (though might be unused depending on the system-
> + specific IP core configuration), GIC, CPC, virtualisation module,
> + eJTAG and PDtrace.
> +
> config CPU_R3000
> bool "R3000"
> depends on SYS_HAS_CPU_R3000
> @@ -1841,7 +1863,8 @@ endchoice
> config CPU_MIPS32_3_5_FEATURES
> bool "MIPS32 Release 3.5 Features"
> depends on SYS_HAS_CPU_MIPS32_R3_5
> - depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6
> + depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
> + CPU_P5600
> help
> Choose this option to build a kernel for release 2 or later of the
> MIPS32 architecture including features from the 3.5 release such as
> @@ -1861,7 +1884,7 @@ config CPU_MIPS32_3_5_EVA
> config CPU_MIPS32_R5_FEATURES
> bool "MIPS32 Release 5 Features"
> depends on SYS_HAS_CPU_MIPS32_R5
> - depends on CPU_MIPS32_R2 || CPU_MIPS32_R5
> + depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
> help
> Choose this option to build a kernel for release 2 or later of the
> MIPS32 architecture including features from release 5 such as
> @@ -2016,6 +2039,10 @@ config SYS_HAS_CPU_MIPS64_R6
> bool
> select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>
> +config SYS_HAS_CPU_P5600
> + bool
> + select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
> +
P5600 is CPU_MIPS_R5 so can't you select it here and drop all the || CPU_5600
above/below ?
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]
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