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Message-ID: <20200508132809.GA15641@alpha.franken.de>
Date: Fri, 8 May 2020 15:28:09 +0200
From: Thomas Bogendoerfer <tsbogend@...ha.franken.de>
To: Sergey.Semin@...kalelectronics.ru
Cc: Paul Burton <paulburton@...nel.org>,
Serge Semin <fancer.lancer@...il.com>,
Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>,
Ralf Baechle <ralf@...ux-mips.org>,
Arnd Bergmann <arnd@...db.de>,
Rob Herring <robh+dt@...nel.org>, linux-pm@...r.kernel.org,
devicetree@...r.kernel.org, Jiaxun Yang <jiaxun.yang@...goat.com>,
Philippe Mathieu-Daudé <f4bug@...at.org>,
linux-mips@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 08/20] mips: Fix cpu_has_mips64r1/2 activation for
MIPS32 CPUs
On Wed, May 06, 2020 at 08:42:26PM +0300, Sergey.Semin@...kalelectronics.ru wrote:
> From: Serge Semin <Sergey.Semin@...kalelectronics.ru>
> diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
> index e2f31bd6363b..7e22b9c1e279 100644
> --- a/arch/mips/include/asm/cpu-features.h
> +++ b/arch/mips/include/asm/cpu-features.h
> @@ -64,6 +64,8 @@
> ((MIPS_ISA_REV >= (ge)) && (MIPS_ISA_REV < (lt)))
> #define __isa_range_or_flag(ge, lt, flag) \
> (__isa_range(ge, lt) || ((MIPS_ISA_REV < (lt)) && __isa(flag)))
> +#define __isa_range_and_flag(ge, lt, flag) \
> + (__isa_range(ge, lt) && __isa(flag))
>
> /*
> * SMP assumption: Options of CPU 0 are a superset of all processors.
> @@ -291,10 +293,10 @@
> # define cpu_has_mips32r6 __isa_ge_or_flag(6, MIPS_CPU_ISA_M32R6)
> #endif
> #ifndef cpu_has_mips64r1
> -# define cpu_has_mips64r1 __isa_range_or_flag(1, 6, MIPS_CPU_ISA_M64R1)
> +# define cpu_has_mips64r1 __isa_range_and_flag(1, 6, MIPS_CPU_ISA_M64R1)
that's not the correct fix. You want to check for cpu_has_64bits here.
Something like
# define cpu_has_mips64r1 (cpu_has_64bits && __isa_range_or_flag(1, 6, MIPS_CPU_ISA_M64R1))
should do the trick.
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]
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