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Message-ID: <20200508173609.GQ4820@sirena.org.uk>
Date: Fri, 8 May 2020 18:36:09 +0100
From: Mark Brown <broonie@...nel.org>
To: Serge Semin <Sergey.Semin@...kalelectronics.ru>
Cc: Serge Semin <fancer.lancer@...il.com>,
Georgy Vlasov <Georgy.Vlasov@...kalelectronics.ru>,
Ramil Zaripov <Ramil.Zaripov@...kalelectronics.ru>,
Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>,
Maxim Kaurkin <Maxim.Kaurkin@...kalelectronics.ru>,
Pavel Parkhomenko <Pavel.Parkhomenko@...kalelectronics.ru>,
Ekaterina Skachko <Ekaterina.Skachko@...kalelectronics.ru>,
Vadim Vlasov <V.Vlasov@...kalelectronics.ru>,
Alexey Kolotnikov <Alexey.Kolotnikov@...kalelectronics.ru>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
Paul Burton <paulburton@...nel.org>,
Ralf Baechle <ralf@...ux-mips.org>,
Arnd Bergmann <arnd@...db.de>,
Allison Randal <allison@...utok.net>,
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
Gareth Williams <gareth.williams.jx@...esas.com>,
Rob Herring <robh+dt@...nel.org>, linux-mips@...r.kernel.org,
linux-spi@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 00/17] spi: dw: Add generic DW DMA controller support
On Fri, May 08, 2020 at 04:29:25PM +0300, Serge Semin wrote:
> Baikal-T1 SoC provides DW DMA controller to perform low-speed peripherals
> Mem-to-Dev and Dev-to-Mem transaction. This is also applicable to the DW
> APB SSI devices embedded into the SoC. Currently this type DMA device is
This basically all looks good to me (without any hardware specific
knowledge), I had a few comments but they were mostly procedural ones -
mainly getting these bug fixes you've done merged as such. Nice work.
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