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Message-Id: <1589012271-12740-1-git-send-email-Anson.Huang@nxp.com>
Date: Sat, 9 May 2020 16:17:50 +0800
From: Anson Huang <Anson.Huang@....com>
To: robh+dt@...nel.org, shawnguo@...nel.org, s.hauer@...gutronix.de,
kernel@...gutronix.de, festevam@...il.com, horia.geanta@....com,
peng.fan@....com, l.stach@...gutronix.de, agx@...xcpu.org,
leonard.crestez@....com, andrew.smirnov@...il.com, jun.li@....com,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Cc: Linux-imx@....com
Subject: [PATCH 1/2] arm64: dts: imx8mq: Add src node interrupts
Interrupts is a required property according to SRC binding, add
it for SRC node.
Signed-off-by: Anson Huang <Anson.Huang@....com>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index bab8836..ea8699c 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -602,6 +602,7 @@
src: reset-controller@...90000 {
compatible = "fsl,imx8mq-src", "syscon";
reg = <0x30390000 0x10000>;
+ interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
#reset-cells = <1>;
};
--
2.7.4
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