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Message-ID: <27176656.kDElnbHIDG@192.168.0.120>
Date: Sun, 10 May 2020 10:43:36 +0000
From: <Tudor.Ambarus@...rochip.com>
To: <danielwa@...co.com>
CC: <xe-linux-external@...co.com>, <miquel.raynal@...tlin.com>,
<richard@....at>, <vigneshr@...com>,
<linux-mtd@...ts.infradead.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [RFC-PATCH] mtd: spi-nor: add conditional 4B opcodes
Hi, Daniel,
On Thursday, May 7, 2020 7:20:47 PM EEST Daniel Walker wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
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>
> Some chips have 4B opcodes, but there is no way to know if they have
> them. This device tree option allows platform owners to force enable 4b
> opcodes when they know their chips support it even when it can be
> automatically identified.
I would like to detect this at run-time if possible. Maybe we can distinguish
between the flavors of your flash by inspecting BFPT[16], bit 29. I'm planning
to parse the 16th dword of BFPT. What does your flash return after applying
the following patch?
diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c
index f6038d3a3684..99f0ce57c7d0 100644
--- a/drivers/mtd/spi-nor/sfdp.c
+++ b/drivers/mtd/spi-nor/sfdp.c
@@ -457,6 +457,10 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor,
/* Fix endianness of the BFPT DWORDs. */
le32_to_cpu_array(bfpt.dwords, BFPT_DWORD_MAX);
+ for(i = 0; i < BFPT_DWORD_MAX; i++)
+ dev_err(nor->dev, "bfpt.dwords[%d] = %08x\n",
+ i + 1, bfpt.dwords[i]);
+
/* Number of address bytes. */
switch (bfpt.dwords[BFPT_DWORD(1)] & BFPT_DWORD1_ADDRESS_BYTES_MASK) {
case BFPT_DWORD1_ADDRESS_BYTES_3_ONLY:
@@ -972,6 +976,9 @@ static int spi_nor_parse_4bait(struct spi_nor *nor,
/* Fix endianness of the 4BAIT DWORDs. */
le32_to_cpu_array(dwords, SFDP_4BAIT_DWORD_MAX);
+ for(i = 0; i < SFDP_4BAIT_DWORD_MAX; i++)
+ dev_err(nor->dev, "4bait[%d] = %08x\n", i, dwords[i]);
+
/*
* Compute the subset of (Fast) Read commands for which the 4-byte
* version is supported.
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