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Message-ID: <20200512222253.GP2165@builder.lan>
Date: Tue, 12 May 2020 15:22:53 -0700
From: Bjorn Andersson <bjorn.andersson@...aro.org>
To: Maulik Shah <mkshah@...eaurora.org>
Cc: andy.gross@...aro.org, linus.walleij@...aro.org,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-gpio@...r.kernel.org, dianders@...omium.org,
swboyd@...omium.org, rnayak@...eaurora.org, ilina@...eaurora.org,
lsrao@...eaurora.org,
Venkata Narendra Kumar Gutta <vnkgutta@...eaurora.org>
Subject: Re: [PATCH] pinctrl: qcom: Add affinity callbacks to msmgpio IRQ chip
On Thu 30 Apr 23:30 PDT 2020, Maulik Shah wrote:
> From: Venkata Narendra Kumar Gutta <vnkgutta@...eaurora.org>
>
> Wakeup capable GPIO IRQs routed via PDC are not being migrated when a CPU
> is hotplugged. Add affinity callbacks to msmgpio IRQ chip to update the
> affinity of wakeup capable IRQs.
>
> Fixes: e35a6ae0eb3a ("pinctrl/msm: Setup GPIO chip in hierarchy")
> Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@...eaurora.org>
> [mkshah: updated commit text and minor code fixes]
> Signed-off-by: Maulik Shah <mkshah@...eaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@...aro.org>
Regards,
Bjorn
> ---
> drivers/pinctrl/qcom/pinctrl-msm.c | 25 +++++++++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
> diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c
> index 29259fe..83b7d64 100644
> --- a/drivers/pinctrl/qcom/pinctrl-msm.c
> +++ b/drivers/pinctrl/qcom/pinctrl-msm.c
> @@ -1033,6 +1033,29 @@ static void msm_gpio_irq_relres(struct irq_data *d)
> module_put(gc->owner);
> }
>
> +static int msm_gpio_irq_set_affinity(struct irq_data *d,
> + const struct cpumask *dest, bool force)
> +{
> + struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
> + struct msm_pinctrl *pctrl = gpiochip_get_data(gc);
> +
> + if (d->parent_data && test_bit(d->hwirq, pctrl->skip_wake_irqs))
> + return irq_chip_set_affinity_parent(d, dest, force);
> +
> + return 0;
> +}
> +
> +static int msm_gpio_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu_info)
> +{
> + struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
> + struct msm_pinctrl *pctrl = gpiochip_get_data(gc);
> +
> + if (d->parent_data && test_bit(d->hwirq, pctrl->skip_wake_irqs))
> + return irq_chip_set_vcpu_affinity_parent(d, vcpu_info);
> +
> + return 0;
> +}
> +
> static void msm_gpio_irq_handler(struct irq_desc *desc)
> {
> struct gpio_chip *gc = irq_desc_get_handler_data(desc);
> @@ -1131,6 +1154,8 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl)
> pctrl->irq_chip.irq_set_wake = msm_gpio_irq_set_wake;
> pctrl->irq_chip.irq_request_resources = msm_gpio_irq_reqres;
> pctrl->irq_chip.irq_release_resources = msm_gpio_irq_relres;
> + pctrl->irq_chip.irq_set_affinity = msm_gpio_irq_set_affinity;
> + pctrl->irq_chip.irq_set_vcpu_affinity = msm_gpio_irq_set_vcpu_affinity;
>
> np = of_parse_phandle(pctrl->dev->of_node, "wakeup-parent", 0);
> if (np) {
> --
> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
> of Code Aurora Forum, hosted by The Linux Foundation
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