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Message-Id: <1589256511-12446-1-git-send-email-zhangfei.gao@linaro.org>
Date: Tue, 12 May 2020 12:08:29 +0800
From: Zhangfei Gao <zhangfei.gao@...aro.org>
To: Joerg Roedel <joro@...tes.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Hanjun Guo <guohanjun@...wei.com>,
Sudeep Holla <sudeep.holla@....com>,
"Rafael J. Wysocki" <rjw@...ysocki.net>,
Len Brown <lenb@...nel.org>,
jean-philippe <jean-philippe@...aro.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Herbert Xu <herbert@...dor.apana.org.au>,
kenneth-lee-2012@...mail.com, Wangzhou <wangzhou1@...ilicon.com>
Cc: linux-kernel@...r.kernel.org, linux-crypto@...r.kernel.org,
iommu@...ts.linux-foundation.org, linux-acpi@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
Zhangfei Gao <zhangfei.gao@...aro.org>
Subject: [PATCH 0/2] Let pci_fixup_final access iommu_fwnode
Some platform devices appear as PCI but are
actually on the AMBA bus, and they need fixup in
drivers/pci/quirks.c handling iommu_fwnode.
So calling pci_fixup_final after iommu_fwnode is allocated.
For example:
Hisilicon platform device need fixup in
drivers/pci/quirks.c
+static void quirk_huawei_pcie_sva(struct pci_dev *pdev)
+{
+ struct iommu_fwspec *fwspec;
+
+ pdev->eetlp_prefix_path = 1;
+ fwspec = dev_iommu_fwspec_get(&pdev->dev);
+ if (fwspec)
+ fwspec->can_stall = 1;
+}
+
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa250, quirk_huawei_pcie_sva);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa251, quirk_huawei_pcie_sva);
Zhangfei Gao (2):
iommu/of: Let pci_fixup_final access iommu_fwnode
ACPI/IORT: Let pci_fixup_final access iommu_fwnode
drivers/acpi/arm64/iort.c | 1 +
drivers/iommu/of_iommu.c | 1 +
2 files changed, 2 insertions(+)
--
2.7.4
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