linux-kernel - RE: [PATCH RFC v3 00/12] perf pmu-events: Support event aliasing for system PMUs

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Message-ID: <DB8PR04MB67951EB0C491D94052A6CCA2E6BE0@DB8PR04MB6795.eurprd04.prod.outlook.com>
Date:   Tue, 12 May 2020 10:30:00 +0000
From:   Joakim Zhang <qiangqing.zhang@....com>
To:     John Garry <john.garry@...wei.com>,
        "peterz@...radead.org" <peterz@...radead.org>,
        "mingo@...hat.com" <mingo@...hat.com>,
        "acme@...nel.org" <acme@...nel.org>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "alexander.shishkin@...ux.intel.com" 
        <alexander.shishkin@...ux.intel.com>,
        "jolsa@...hat.com" <jolsa@...hat.com>,
        "namhyung@...nel.org" <namhyung@...nel.org>
CC:     "irogers@...gle.com" <irogers@...gle.com>,
        "ak@...ux.intel.com" <ak@...ux.intel.com>,
        "robin.murphy@....com" <robin.murphy@....com>,
        Linuxarm <linuxarm@...wei.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Zhangshaokun <zhangshaokun@...ilicon.com>,
        "will@...nel.org" <will@...nel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>
Subject: RE: [PATCH RFC v3 00/12] perf pmu-events: Support event aliasing for
 system PMUs


> -----Original Message-----
> From: John Garry <john.garry@...wei.com>
> Sent: 2020年5月12日 18:13
> To: Joakim Zhang <qiangqing.zhang@....com>; peterz@...radead.org;
> mingo@...hat.com; acme@...nel.org; mark.rutland@....com;
> alexander.shishkin@...ux.intel.com; jolsa@...hat.com;
> namhyung@...nel.org
> Cc: irogers@...gle.com; ak@...ux.intel.com; robin.murphy@....com;
> Linuxarm <linuxarm@...wei.com>; linux-kernel@...r.kernel.org;
> Zhangshaokun <zhangshaokun@...ilicon.com>; will@...nel.org;
> linux-arm-kernel@...ts.infradead.org
> Subject: Re: [PATCH RFC v3 00/12] perf pmu-events: Support event aliasing for
> system PMUs
> 
> 
> > I have an aside question, do you have any idea? Thanks a lot!
> >
> > For DDR PMU, I want to add bandwidth usage metric, but it depends on DDR
> controller clock frequency.
> > For example, we have i.MX8MM LPDDR4 board which DDR controller clock is
> 800MHZ, and i.MX8MM DDR4 board which DDR controller is 600MHZ, but the
> SoC is the same.
> >
> > So they can share all JSON metrics with identifier "i.mx8mm", except
> bandwidth metric.
>
> what is the bandwidth metric? how is it supposed to be calculated?

Something like below to calculate bandwidth usage:

i.MX8MM LPDDR4 board:  ((read-cycles + write-cycles) * 4 * 4 / duration_time) / (800 * 1000000 * 4 * 4)
i.MX8MM DDR4 board:  ((read-cycles + write-cycles) * 4 * 4 / duration_time) / (600 * 1000000 * 4 * 4)

So this should not be Soc specific, it is board specific, I don't know how to implement it from metric.

> If I add separate JOSN metrics files for identifier "i.mx8mm-lpddr4" and
> identifier "i.mx8mm-ddr4", then it's going to be very redundant, since most
> metrics are same just the identifier is different.
> >
> > Do you know how perf tool handle such case?
> 
> jirka is supporting user-defined metric here:
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.ker
> nel.org%2Flkml%2F20200511205307.3107775-1-jolsa%40kernel.org%2F&amp;
> data=02%7C01%7Cqiangqing.zhang%40nxp.com%7Cbbd26d737cf44896ed360
> 8d7f65d33ad%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637248
> 752464922384&amp;sdata=wGqQ4%2B6rejJYrDj0SzeGJn09r660QIzOvRy0DCw
> EGVQ%3D&amp;reserved=0
> 
> So maybe you can use that somehow with separate scripts.

Thanks for your hint, I will research it to see if it is possible.

Best Regards,
Joakim Zhang
> Thanks,
> John