[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <DM6PR19MB26827EFC4DDC6CB9DD5C52D098BF0@DM6PR19MB2682.namprd19.prod.outlook.com>
Date: Wed, 13 May 2020 08:29:16 +0000
From: "Ravich, Leonid" <Leonid.Ravich@...l.com>
To: "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
"Idgar, Or" <Or.Idgar@...l.com>
CC: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-mm@...ck.org" <linux-mm@...ck.org>
Subject: RE: CMA enhancement - non-default areas in x86
PCIe NTB
Documentation/driver-api/ntb.rst
1) Basically PCI bridge between to root complex / PCI switches
2) using out of OS memory is one solution but then this memory is
Limited for usage by other stack, ex: get_user_pages on this memory will fail,
Therefore attempting to use it for block layer with (o_direct) will fail.
Acutely any generic stack which attempts to "pin" this memory will fail.
Leonid Ravich
> -----Original Message-----
> From: gregkh@...uxfoundation.org <gregkh@...uxfoundation.org>
> Sent: Wednesday, May 13, 2020 10:14 AM
> To: Idgar, Or
> Cc: linux-kernel@...r.kernel.org; linux-mm@...ck.org; Ravich, Leonid
> Subject: Re: CMA enhancement - non-default areas in x86
>
> On Wed, May 13, 2020 at 07:00:12AM +0000, Idgar, Or wrote:
> > > For what type of device?
> > NTB (Non-Transparent Bridge).
>
>
> Very odd quoting style...
>
> Anyway, what exactly is a non-transparent bridge, and why doesn't your
> bios/uefi implementation properly reserve the memory for it so that the OS
> does not use it?
>
> thanks,
>
> greg k-h
Powered by blists - more mailing lists