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Message-ID: <20200513113656.GF4803@sirena.org.uk>
Date: Wed, 13 May 2020 12:36:56 +0100
From: Mark Brown <broonie@...nel.org>
To: Serge Semin <Sergey.Semin@...kalelectronics.ru>
Cc: Serge Semin <fancer.lancer@...il.com>,
Georgy Vlasov <Georgy.Vlasov@...kalelectronics.ru>,
Ramil Zaripov <Ramil.Zaripov@...kalelectronics.ru>,
Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
Paul Burton <paulburton@...nel.org>,
Ralf Baechle <ralf@...ux-mips.org>,
Arnd Bergmann <arnd@...db.de>,
Allison Randal <allison@...utok.net>,
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
Gareth Williams <gareth.williams.jx@...esas.com>,
Rob Herring <robh+dt@...nel.org>, linux-mips@...r.kernel.org,
devicetree@...r.kernel.org, Thomas Gleixner <tglx@...utronix.de>,
"wuxu.wu" <wuxu.wu@...wei.com>,
Linus Walleij <linus.walleij@...aro.org>,
linux-spi@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 07/17] spi: dw: Add Tx/Rx finish wait methods to DMA
On Wed, May 13, 2020 at 02:35:55PM +0300, Serge Semin wrote:
> On Fri, May 08, 2020 at 06:30:23PM +0100, Mark Brown wrote:
> > > + while (dw_spi_dma_tx_busy(dws) && retry--)
> > > + ndelay(ns);
> > How deep can the FIFO be with this IP - could we end up ndelay()ing for
> > non-trivial amounts of time?
> According to the DW APB SSI db it can be up to 256 transfer words. So the delay
> should be trivial.
Yes, that should be fine.
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