linux-kernel - Re: [PATCH v2 3/6] irqchip: Add Loongson PCH PIC controller

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Message-ID: <877dxg3ul6.fsf@nanos.tec.linutronix.de>
Date:   Wed, 13 May 2020 14:09:09 +0200
From:   Thomas Gleixner <tglx@...utronix.de>
To:     Jiaxun Yang <jiaxun.yang@...goat.com>, maz@...nel.org
Cc:     Jiaxun Yang <jiaxun.yang@...goat.com>,
        Jason Cooper <jason@...edaemon.net>,
        Rob Herring <robh+dt@...nel.org>,
        Huacai Chen <chenhc@...ote.com>, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, linux-mips@...r.kernel.org
Subject: Re: [PATCH v2 3/6] irqchip: Add Loongson PCH PIC controller

Jiaxun Yang <jiaxun.yang@...goat.com> writes:
> +static void pch_pic_bitset(struct pch_pic *priv, int offset, int bit)
> +{
> +	void __iomem *addr = priv->base + offset + PIC_REG_IDX(bit) * 4;
> +	unsigned long flags;
> +	u32 reg;
> +
> +	raw_spin_lock_irqsave(&priv->pic_lock, flags);

See other reply.

> +	reg = readl(addr);
> +	reg |= BIT(PIC_REG_BIT(bit));
> +	writel(reg, addr);
> +	raw_spin_unlock_irqrestore(&priv->pic_lock, flags);
> +}
> +static int pch_pic_of_init(struct device_node *node,
> +				struct device_node *parent)
> +{
> +	struct pch_pic *priv;
> +	struct irq_domain *parent_domain;
> +	int err;

ordering

Thanks,

        tglx