linux-kernel - [tip: locking/kcsan] READ_ONCE: Fix comment describing 2x32-bit atomicity

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Message-ID: <158937252745.390.15949021620332290976.tip-bot2@tip-bot2>
Date:   Wed, 13 May 2020 12:22:07 -0000
From:   "tip-bot2 for Will Deacon" <tip-bot2@...utronix.de>
To:     linux-tip-commits@...r.kernel.org
Cc:     Jann Horn <jannh@...gle.com>, Will Deacon <will@...nel.org>,
        Thomas Gleixner <tglx@...utronix.de>, x86 <x86@...nel.org>,
        LKML <linux-kernel@...r.kernel.org>
Subject: [tip: locking/kcsan] READ_ONCE: Fix comment describing 2x32-bit atomicity

The following commit has been merged into the locking/kcsan branch of tip:

Commit-ID:     ffed638b6a2180da8fd002a46632d746af72b299
Gitweb:        https://git.kernel.org/tip/ffed638b6a2180da8fd002a46632d746af72b299
Author:        Will Deacon <will@...nel.org>
AuthorDate:    Tue, 12 May 2020 10:01:01 +01:00
Committer:     Thomas Gleixner <tglx@...utronix.de>
CommitterDate: Wed, 13 May 2020 14:17:09 +02:00

READ_ONCE: Fix comment describing 2x32-bit atomicity

READ_ONCE() permits 64-bit accesses on 32-bit architectures, since this
crops up in a few places and is generally harmless because either the
upper bits are always zero (e.g. for a virtual address or 32-bit time_t)
or the architecture provides 64-bit atomicity anyway.

Update the corresponding comment above compiletime_assert_rwonce_type(),
which incorrectly states that 32-bit x86 provides 64-bit atomicity, and
instead reference 32-bit Armv7 with LPAE.

Reported-by: Jann Horn <jannh@...gle.com>
Signed-off-by: Will Deacon <will@...nel.org>
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
Link: https://lkml.kernel.org/r/20200512090101.2497-1-will@kernel.org

---
 include/linux/compiler.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/linux/compiler.h b/include/linux/compiler.h
index 741c93c..e24cc3a 100644
--- a/include/linux/compiler.h
+++ b/include/linux/compiler.h
@@ -384,9 +384,9 @@ static inline void *offset_to_ptr(const int *off)
 
 /*
  * Yes, this permits 64-bit accesses on 32-bit architectures. These will
- * actually be atomic in many cases (namely x86), but for others we rely on
- * the access being split into 2x32-bit accesses for a 32-bit quantity (e.g.
- * a virtual address) and a strong prevailing wind.
+ * actually be atomic in some cases (namely Armv7 + LPAE), but for others we
+ * rely on the access being split into 2x32-bit accesses for a 32-bit quantity
+ * (e.g. a virtual address) and a strong prevailing wind.
  */
 #define compiletime_assert_rwonce_type(t)					\
 	compiletime_assert(__native_word(t) || sizeof(t) == sizeof(long long),	\