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Message-ID: <20200513125532.24585-1-lars.povlsen@microchip.com>
Date: Wed, 13 May 2020 14:55:18 +0200
From: Lars Povlsen <lars.povlsen@...rochip.com>
To: SoC Team <soc@...nel.org>, Arnd Bergmann <arnd@...db.de>,
Stephen Boyd <sboyd@...nel.org>,
Linus Walleij <linus.walleij@...aro.org>
CC: Lars Povlsen <lars.povlsen@...rochip.com>,
Steen Hegelund <Steen.Hegelund@...rochip.com>,
Microchip Linux Driver Support <UNGLinuxDriver@...rochip.com>,
Olof Johansson <olof@...om.net>,
"Michael Turquette" <mturquette@...libre.com>,
<devicetree@...r.kernel.org>, <linux-clk@...r.kernel.org>,
<linux-gpio@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
Subject: [PATCH 00/14] Adding support for Microchip Sparx5 SoC
This patch series adds support for Microchip Sparx5 SoC, the CPU
system of a advanced, TSN capable gigabit switch. The CPU is an armv8
x 2 CPU core (A53).
Although this is an ARM core, it shares some peripherals with the
Microsemi Ocelot SoC.
This is the first official revision of the series.
Lars Povlsen (14):
pinctrl: ocelot: Should register GPIO's even if not irq controller
pinctrl: ocelot: Remove instance number from pin functions
pinctrl: ocelot: Fix GPIO interrupt decoding on Jaguar2
arm64: sparx5: Add support for Microchip 2xA53 SoC
dt-bindings: arm: sparx5: Add documentation for Microchip Sparx5 SoC
arm64: dts: sparx5: Add basic cpu support
dt-bindings: pinctrl: ocelot: Add Sparx5 SoC support
arm64: dts: sparx5: Add pinctrl support
pinctrl: ocelot: Add Sparx5 SoC support
dt-bindings: clock: sparx5: Add Sparx5 SoC DPLL clock
dt-bindings: clock: sparx5: Add bindings include file
clk: sparx5: Add Sparx5 SoC DPLL clock driver
arm64: dts: sparx5: Add Sparx5 SoC DPLL clock
arm64: dts: sparx5: Add i2c devices, i2c muxes
.../bindings/arm/microchip,sparx5.yaml | 87 +++
.../bindings/clock/microchip,sparx5-dpll.yaml | 46 ++
.../bindings/pinctrl/mscc,ocelot-pinctrl.txt | 4 +-
MAINTAINERS | 9 +
arch/arm64/Kconfig.platforms | 14 +
arch/arm64/boot/dts/Makefile | 1 +
arch/arm64/boot/dts/microchip/Makefile | 4 +
arch/arm64/boot/dts/microchip/sparx5.dtsi | 202 +++++++
.../boot/dts/microchip/sparx5_pcb125.dts | 21 +
.../boot/dts/microchip/sparx5_pcb134.dts | 17 +
.../dts/microchip/sparx5_pcb134_board.dtsi | 252 ++++++++
.../boot/dts/microchip/sparx5_pcb134_emmc.dts | 17 +
.../boot/dts/microchip/sparx5_pcb135.dts | 17 +
.../dts/microchip/sparx5_pcb135_board.dtsi | 92 +++
.../boot/dts/microchip/sparx5_pcb135_emmc.dts | 17 +
.../boot/dts/microchip/sparx5_pcb_common.dtsi | 19 +
drivers/clk/Makefile | 1 +
drivers/clk/clk-sparx5.c | 269 +++++++++
drivers/pinctrl/pinctrl-ocelot.c | 558 +++++++++++++++---
include/dt-bindings/clock/microchip,sparx5.h | 23 +
20 files changed, 1587 insertions(+), 83 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/microchip,sparx5.yaml
create mode 100644 Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml
create mode 100644 arch/arm64/boot/dts/microchip/Makefile
create mode 100644 arch/arm64/boot/dts/microchip/sparx5.dtsi
create mode 100644 arch/arm64/boot/dts/microchip/sparx5_pcb125.dts
create mode 100644 arch/arm64/boot/dts/microchip/sparx5_pcb134.dts
create mode 100644 arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi
create mode 100644 arch/arm64/boot/dts/microchip/sparx5_pcb134_emmc.dts
create mode 100644 arch/arm64/boot/dts/microchip/sparx5_pcb135.dts
create mode 100644 arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi
create mode 100644 arch/arm64/boot/dts/microchip/sparx5_pcb135_emmc.dts
create mode 100644 arch/arm64/boot/dts/microchip/sparx5_pcb_common.dtsi
create mode 100644 drivers/clk/clk-sparx5.c
create mode 100644 include/dt-bindings/clock/microchip,sparx5.h
--
2.26.2
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