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Date:   Wed, 13 May 2020 15:27:00 +0200
From:   Alexandre Belloni <alexandre.belloni@...tlin.com>
To:     Lars Povlsen <lars.povlsen@...rochip.com>
Cc:     Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
        Microchip Linux Driver Support <UNGLinuxDriver@...rochip.com>,
        linux-mips@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] MIPS: dts: mscc: Updated changed name for miim pinctrl
 function

On 13/05/2020 15:23:47+0200, Lars Povlsen wrote:
> This is an add-on patch to the main SoC Sparx5 series
> (Message-ID: <20200513125532.24585-1-lars.povlsen@...rochip.com>).
> 
> This changes the miim pinctrl function name from "miim1" to "miim" due
> to refactoring in the driver, obsoleting the instance number.
> 
> The change in the driver was to better fit new platforms, as the
> instance number is redundant information. Specifically, support for
> the Microchip Sparx5 SoC is being submitted, where this change became
> necessary.
> 
> Reviewed-by: Alexandre Belloni <alexandre.belloni@...tlin.com>
> Signed-off-by: Lars Povlsen <lars.povlsen@...rochip.com>
Acked-by: Alexandre Belloni <alexandre.belloni@...tlin.com>

> ---
>  arch/mips/boot/dts/mscc/ocelot.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/mips/boot/dts/mscc/ocelot.dtsi b/arch/mips/boot/dts/mscc/ocelot.dtsi
> index 797d336db54d3..f94e8a02ed06b 100644
> --- a/arch/mips/boot/dts/mscc/ocelot.dtsi
> +++ b/arch/mips/boot/dts/mscc/ocelot.dtsi
> @@ -214,7 +214,7 @@ uart2_pins: uart2-pins {
> 
>  			miim1: miim1 {
>  				pins = "GPIO_14", "GPIO_15";
> -				function = "miim1";
> +				function = "miim";
>  			};
> 
>  		};
> --
> 2.26.2

-- 
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

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