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Date:   Thu, 14 May 2020 14:06:32 -0500
From:   Rob Herring <robh@...nel.org>
To:     Serge Semin <Sergey.Semin@...kalelectronics.ru>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Ralf Baechle <ralf@...ux-mips.org>,
        Serge Semin <fancer.lancer@...il.com>,
        Arnd Bergmann <arnd@...db.de>, linux-mips@...r.kernel.org,
        devicetree@...r.kernel.org, Thomas Gleixner <tglx@...utronix.de>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        linux-rtc@...r.kernel.org, Marc Zyngier <maz@...nel.org>,
        Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>,
        Alexandre Belloni <alexandre.belloni@...tlin.com>,
        linux-kernel@...r.kernel.org, Jason Cooper <jason@...edaemon.net>,
        Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
        Alessandro Zummo <a.zummo@...ertech.it>,
        Paul Burton <paulburton@...nel.org>
Subject: Re: [PATCH v3 3/7] dt-bindings: interrupt-controller: Convert
 mti,gic to DT schema

On Thu, 7 May 2020 00:41:03 +0300, Serge Semin wrote:
> Modern device tree bindings are supposed to be created as YAML-files
> in accordance with DT schema. This commit replaces MIPS GIC legacy bare
> text binding with YAML file. As before the binding file states that the
> corresponding dts node is supposed to be compatible with MIPS Global
> Interrupt Controller indicated by the "mti,gic" compatible string and
> to provide a mandatory interrupt-controller and '#interrupt-cells'
> properties. There might be optional registers memory range,
> "mti,reserved-cpu-vectors" and "mti,reserved-ipi-vectors" properties
> specified.
> 
> MIPS GIC also includes a free-running global timer, per-CPU count/compare
> timers, and a watchdog. Since currently the GIC Timer is only supported the
> DT schema expects an IRQ and clock-phandler charged timer sub-node with
> "mti,mips-gic-timer" compatible string.
> 
> Signed-off-by: Serge Semin <Sergey.Semin@...kalelectronics.ru>
> Cc: Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>
> Cc: Thomas Bogendoerfer <tsbogend@...ha.franken.de>
> Cc: Paul Burton <paulburton@...nel.org>
> Cc: Ralf Baechle <ralf@...ux-mips.org>
> Cc: Alessandro Zummo <a.zummo@...ertech.it>
> Cc: Alexandre Belloni <alexandre.belloni@...tlin.com>
> Cc: Daniel Lezcano <daniel.lezcano@...aro.org>
> Cc: Arnd Bergmann <arnd@...db.de>
> Cc: linux-mips@...r.kernel.org
> Cc: linux-rtc@...r.kernel.org
> 
> ---
> 
> I don't really know who is the corresponding driver maintainer, so I
> added Paul to the maintainers property since he used to be looking for the
> MIPS arch and Thomas looking after it now. Any idea what email should be
> specified there instead?
> 
> Changelog v3:
> - Since timer sub-node has no unit-address, the node shouldn't be named
>   with one. So alter the MIPS GIC bindings to have a pure "timer"
>   sub-node.
> - Discard allOf: [ $ref: /schemas/interrupt-controller.yaml# ].
> - Since it's a conversion patch use GPL-2.0-only SPDX header.
> ---
>  .../interrupt-controller/mips-gic.txt         |  67 --------
>  .../interrupt-controller/mti,gic.yaml         | 148 ++++++++++++++++++
>  2 files changed, 148 insertions(+), 67 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/mips-gic.txt
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/mti,gic.yaml
> 

Reviewed-by: Rob Herring <robh@...nel.org>

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