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Message-ID: <1443118821.20546.1589415156226.JavaMail.zimbra@efficios.com>
Date: Wed, 13 May 2020 20:12:36 -0400 (EDT)
From: Mathieu Desnoyers <mathieu.desnoyers@...icios.com>
To: Thomas Gleixner <tglx@...utronix.de>
Cc: linux-kernel <linux-kernel@...r.kernel.org>, x86 <x86@...nel.org>,
paulmck <paulmck@...nel.org>, Andy Lutomirski <luto@...nel.org>,
Alexandre Chartre <alexandre.chartre@...cle.com>,
Frederic Weisbecker <frederic@...nel.org>,
Paolo Bonzini <pbonzini@...hat.com>,
Sean Christopherson <sean.j.christopherson@...el.com>,
Masami Hiramatsu <mhiramat@...nel.org>,
Petr Mladek <pmladek@...e.com>, rostedt <rostedt@...dmis.org>,
"Joel Fernandes, Google" <joel@...lfernandes.org>,
Boris Ostrovsky <boris.ostrovsky@...cle.com>,
Juergen Gross <jgross@...e.com>,
Brian Gerst <brgerst@...il.com>,
Josh Poimboeuf <jpoimboe@...hat.com>,
Will Deacon <will@...nel.org>,
Peter Zijlstra <peterz@...radead.org>
Subject: Re: [patch V4 part 1 35/36] x86: Replace ist_enter() with
nmi_enter()
----- On May 5, 2020, at 9:16 AM, Thomas Gleixner tglx@...utronix.de wrote:
> From: Peter Zijlstra <peterz@...radead.org>
>
> A few exceptions (like #DB and #BP) can happen at any location in the code,
> this then means that tracers should treat events from these exceptions as
> NMI-like. The interrupted context could be holding locks with interrupts
> disabled for instance.
>
> Similarly, #MC is an actual NMI-like exception.
>
> All of them use ist_enter() which only concerns itself with RCU, but does
> not do any of the other setup that NMIs need. This means things like:
>
> printk()
> raw_spin_lock_irq(&logbuf_lock);
> <#DB/#BP/#MC>
> printk()
> raw_spin_lock_irq(&logbuf_lock);
>
> are entirely possible (well, not really since printk tries hard to
> play nice, but the concept stands).
>
> So replace ist_enter() with nmi_enter(). Also observe that any nmi_enter()
> caller must be both notrace and NOKPROBE, or in the noinstr text section.
Are there similar issues with non-x86 architectures, or is this
exception-behaves-like-an-interrupt issue specific to x86 ?
Thanks,
Mathieu
--
Mathieu Desnoyers
EfficiOS Inc.
http://www.efficios.com
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