linux-kernel - Re: [PATCH] mmc: sdhci-of-dwcmshc: implement specific set_uhs

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Message-ID: <CAPDyKFr90VZof91VBzLU6JWsna43c++QxL9Z3WREVC7NZTQ=QQ@mail.gmail.com>
Date:   Fri, 15 May 2020 09:09:31 +0200
From:   Ulf Hansson <ulf.hansson@...aro.org>
To:     Jisheng Zhang <Jisheng.Zhang@...aptics.com>
Cc:     Adrian Hunter <adrian.hunter@...el.com>,
        "linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] mmc: sdhci-of-dwcmshc: implement specific set_uhs_signaling

On Wed, 13 May 2020 at 12:26, Jisheng Zhang <Jisheng.Zhang@...aptics.com> wrote:
>
> We need a different set_uhs_signaling implementation for
> MMC_TIMING_MMC_HS and MMC_TIMING_MMC_HS400.
>
> Signed-off-by: Jisheng Zhang <Jisheng.Zhang@...aptics.com>

Applied for next, thanks!

Kind regards
Uffe


> ---
>  drivers/mmc/host/sdhci-of-dwcmshc.c | 31 ++++++++++++++++++++++++++++-
>  1 file changed, 30 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
> index a5137845a1c7..a9ed0e006e06 100644
> --- a/drivers/mmc/host/sdhci-of-dwcmshc.c
> +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
> @@ -16,6 +16,9 @@
>
>  #include "sdhci-pltfm.h"
>
> +/* DWCMSHC specific Mode Select value */
> +#define DWCMSHC_CTRL_HS400             0x7
> +
>  #define BOUNDARY_OK(addr, len) \
>         ((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
>
> @@ -46,10 +49,36 @@ static void dwcmshc_adma_write_desc(struct sdhci_host *host, void **desc,
>         sdhci_adma_write_desc(host, desc, addr, len, cmd);
>  }
>
> +static void dwcmshc_set_uhs_signaling(struct sdhci_host *host,
> +                                     unsigned int timing)
> +{
> +       u16 ctrl_2;
> +
> +       ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);
> +       /* Select Bus Speed Mode for host */
> +       ctrl_2 &= ~SDHCI_CTRL_UHS_MASK;
> +       if ((timing == MMC_TIMING_MMC_HS200) ||
> +           (timing == MMC_TIMING_UHS_SDR104))
> +               ctrl_2 |= SDHCI_CTRL_UHS_SDR104;
> +       else if (timing == MMC_TIMING_UHS_SDR12)
> +               ctrl_2 |= SDHCI_CTRL_UHS_SDR12;
> +       else if ((timing == MMC_TIMING_UHS_SDR25) ||
> +                (timing == MMC_TIMING_MMC_HS))
> +               ctrl_2 |= SDHCI_CTRL_UHS_SDR25;
> +       else if (timing == MMC_TIMING_UHS_SDR50)
> +               ctrl_2 |= SDHCI_CTRL_UHS_SDR50;
> +       else if ((timing == MMC_TIMING_UHS_DDR50) ||
> +                (timing == MMC_TIMING_MMC_DDR52))
> +               ctrl_2 |= SDHCI_CTRL_UHS_DDR50;
> +       else if (timing == MMC_TIMING_MMC_HS400)
> +               ctrl_2 |= DWCMSHC_CTRL_HS400;
> +       sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);
> +}
> +
>  static const struct sdhci_ops sdhci_dwcmshc_ops = {
>         .set_clock              = sdhci_set_clock,
>         .set_bus_width          = sdhci_set_bus_width,
> -       .set_uhs_signaling      = sdhci_set_uhs_signaling,
> +       .set_uhs_signaling      = dwcmshc_set_uhs_signaling,
>         .get_max_clock          = sdhci_pltfm_clk_get_max_clock,
>         .reset                  = sdhci_reset,
>         .adma_write_desc        = dwcmshc_adma_write_desc,
> --
> 2.26.2
>