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Message-Id: <9884c56219e9bdbeec179c27ea2b734dbb5f1289.1589548223.git.agx@sigxcpu.org>
Date:   Fri, 15 May 2020 15:12:12 +0200
From:   Guido Günther <agx@...xcpu.org>
To:     Laurent Pinchart <Laurent.pinchart@...asonboard.com>,
        David Airlie <airlied@...ux.ie>,
        Daniel Vetter <daniel@...ll.ch>,
        Rob Herring <robh+dt@...nel.org>,
        Shawn Guo <shawnguo@...nel.org>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        Fabio Estevam <festevam@...il.com>,
        NXP Linux Team <linux-imx@....com>,
        Andrzej Hajda <a.hajda@...sung.com>,
        Sam Ravnborg <sam@...nborg.org>,
        Anson Huang <Anson.Huang@....com>,
        Leonard Crestez <leonard.crestez@....com>,
        Lucas Stach <l.stach@...gutronix.de>,
        Peng Fan <peng.fan@....com>,
        Robert Chiras <robert.chiras@....com>,
        dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: [RFC PATCH 3/6] dt-bindings: display/bridge/nwl-dsi: Drop mux handling

No need to encode the SoC specifics in the bridge driver. For the
imx8mq we can use the mux-input-bridge.

Signed-off-by: Guido Günther <agx@...xcpu.org>
---
 .../devicetree/bindings/display/bridge/nwl-dsi.yaml         | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml b/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml
index 8aff2d68fc33..d2c2d4e19a25 100644
--- a/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml
@@ -46,10 +46,6 @@ properties:
       - const: phy_ref
       - const: lcdif
 
-  mux-controls:
-    description:
-      mux controller node to use for operating the input mux
-
   phys:
     maxItems: 1
     description:
@@ -151,7 +147,6 @@ required:
   - clocks
   - compatible
   - interrupts
-  - mux-controls
   - phy-names
   - phys
   - ports
@@ -180,7 +175,6 @@ examples:
                        <&clk IMX8MQ_CLK_LCDIF_PIXEL>;
               clock-names = "core", "rx_esc", "tx_esc", "phy_ref", "lcdif";
               interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
-              mux-controls = <&mux 0>;
               power-domains = <&pgc_mipi>;
               resets = <&src IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N>,
                        <&src IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N>,
-- 
2.26.1

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