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Date:   Fri, 15 May 2020 16:04:39 +0200
From:   Frederic Weisbecker <frederic@...nel.org>
To:     Mathieu Desnoyers <mathieu.desnoyers@...icios.com>,
        Will Deacon <will@...nel.org>
Cc:     Thomas Gleixner <tglx@...utronix.de>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        x86 <x86@...nel.org>, paulmck <paulmck@...nel.org>,
        Andy Lutomirski <luto@...nel.org>,
        Alexandre Chartre <alexandre.chartre@...cle.com>,
        Paolo Bonzini <pbonzini@...hat.com>,
        Sean Christopherson <sean.j.christopherson@...el.com>,
        Masami Hiramatsu <mhiramat@...nel.org>,
        Petr Mladek <pmladek@...e.com>, rostedt <rostedt@...dmis.org>,
        "Joel Fernandes, Google" <joel@...lfernandes.org>,
        Boris Ostrovsky <boris.ostrovsky@...cle.com>,
        Juergen Gross <jgross@...e.com>,
        Brian Gerst <brgerst@...il.com>,
        Josh Poimboeuf <jpoimboe@...hat.com>,
        Peter Zijlstra <peterz@...radead.org>,
        Catalin Marinas <catalin.marinas@....com>
Subject: Re: [patch V4 part 1 27/36] arm64: Prepare arch_nmi_enter() for
 recursion

On Wed, May 13, 2020 at 07:28:34PM -0400, Mathieu Desnoyers wrote:
> ----- On May 5, 2020, at 9:16 AM, Thomas Gleixner tglx@...utronix.de wrote:
> 
> > +#define arch_nmi_enter()						\
> [...]							\
> > +	___hcr = read_sysreg(hcr_el2);					\
> > +	if (!(___hcr & HCR_TGE)) {					\
> > +		write_sysreg(___hcr | HCR_TGE, hcr_el2);		\
> > +		isb();							\
> 
> Why is there an isb() above ^ ....
> 
> > +	}								\
> > +	/*								\
> [...]
> > -#define arch_nmi_exit()								\
> [...]
> > +	/*								\
> > +	 * Make sure ___ctx->cnt release is visible before we		\
> > +	 * restore the sysreg. Otherwise a new NMI occurring		\
> > +	 * right after write_sysreg() can be fooled and think		\
> > +	 * we secured things for it.					\
> > +	 */								\
> > +	barrier();							\
> > +	if (!___ctx->cnt && !(___hcr & HCR_TGE))			\
> > +		write_sysreg(___hcr, hcr_el2);				\
> 
> And not here ?

I have to defer to Will on this detail...

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