lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Date:   Fri, 15 May 2020 09:35:03 -0500
From:   richard.gong@...ux.intel.com
To:     mdf@...nel.org
Cc:     linux-fpga@...r.kernel.org, linux-kernel@...r.kernel.org,
        dinguyen@...nel.org, richard.gong@...ux.intel.com,
        Richard Gong <richard.gong@...el.com>
Subject: [PATCHv2] fpga: stratix10-soc: remove the pre-set reconfiguration condition

From: Richard Gong <richard.gong@...el.com>

The reconfiguration mode is pre-set by driver as the full reconfiguration.
As a result, user have to change code and recompile the drivers if he or
she wants to perform a partial reconfiguration. Removing the pre-set
reconfiguration condition so that user can select full or partial
reconfiguration via overlay device tree without recompiling the drivers.

Also add an error message if the configuration request is failure.

Signed-off-by: Richard Gong <richard.gong@...el.com>
---
v2: define and use constant values
---
 drivers/fpga/stratix10-soc.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/fpga/stratix10-soc.c b/drivers/fpga/stratix10-soc.c
index 44b7c56..4d52a80 100644
--- a/drivers/fpga/stratix10-soc.c
+++ b/drivers/fpga/stratix10-soc.c
@@ -14,9 +14,13 @@
 /*
  * FPGA programming requires a higher level of privilege (EL3), per the SoC
  * design.
+ * SoC firmware supports full and partial reconfiguration.
  */
 #define NUM_SVC_BUFS	4
 #define SVC_BUF_SIZE	SZ_512K
+#define FULL_RECONFIG_FLAG	0
+#define PARTIAL_RECONFIG_FLAG	1
+
 
 /* Indicates buffer is in use if set */
 #define SVC_BUF_LOCK	0
@@ -182,12 +186,12 @@ static int s10_ops_write_init(struct fpga_manager *mgr,
 	uint i;
 	int ret;
 
-	ctype.flags = 0;
 	if (info->flags & FPGA_MGR_PARTIAL_RECONFIG) {
 		dev_dbg(dev, "Requesting partial reconfiguration.\n");
-		ctype.flags |= BIT(COMMAND_RECONFIG_FLAG_PARTIAL);
+		ctype.flags = PARTIAL_RECONFIG_FLAG;
 	} else {
 		dev_dbg(dev, "Requesting full reconfiguration.\n");
+		ctype.flags = FULL_RECONFIG_FLAG;
 	}
 
 	reinit_completion(&priv->status_return_completion);
@@ -210,6 +214,7 @@ static int s10_ops_write_init(struct fpga_manager *mgr,
 
 	ret = 0;
 	if (!test_and_clear_bit(SVC_STATUS_OK, &priv->status)) {
+		dev_err(dev, "RECONFIG_REQUEST failed\n");
 		ret = -ETIMEDOUT;
 		goto init_done;
 	}
-- 
2.7.4

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ