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Message-ID: <18c0d9ef-9a2b-31d0-b317-f051bb26a907@arm.com>
Date: Fri, 15 May 2020 16:30:36 +0100
From: Robin Murphy <robin.murphy@....com>
To: Lars Povlsen <lars.povlsen@...rochip.com>,
Marc Zyngier <maz@...terjones.org>
Cc: devicetree@...r.kernel.org,
Alexandre Belloni <alexandre.belloni@...tlin.com>,
Arnd Bergmann <arnd@...db.de>, Stephen Boyd <sboyd@...nel.org>,
Linus Walleij <linus.walleij@...aro.org>,
linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
linux-gpio@...r.kernel.org, SoC Team <soc@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
linux-arm-kernel@...ts.infradead.org,
Olof Johansson <olof@...om.net>,
Microchip Linux Driver Support <UNGLinuxDriver@...rochip.com>,
Steen Hegelund <Steen.Hegelund@...rochip.com>
Subject: Re: [PATCH 06/14] arm64: dts: sparx5: Add basic cpu support
On 2020-05-15 16:09, Lars Povlsen wrote:
[...]
>>> + cpu0: cpu@0 {
>>> + compatible = "arm,cortex-a53", "arm,armv8";
Side note: only one compatible string for the real CPU please, running a
DT bindings check should complain about that.
>>> + device_type = "cpu";
>>> + reg = <0x0 0x0>;
>>> + enable-method = "spin-table";
>>
>> Really? This is 2020, not 2012 any more. Surely a new platform
>> boots using PSCI, and not *this*.
>>
>
> We don't currently support PSCI. The platform does not have TrustZone,
> hence we don't use ATF.
AIUI, part of the purpose of ATF is to provide a nice standardised
platform interface regardless of whether you care about Secure software
or not. It shouldn't take much to knock up a trivial ATF port that just
uses an internal spin-table for its PSCI backend - in fact I suspect
that's probably just a copy-paste from the RPi3 port ;)
Robin.
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