lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <CACRpkdbpt9GGegm1TZSQ1-ohDB6682cLpQbipHT24dpuKHLBvQ@mail.gmail.com>
Date:   Sat, 16 May 2020 11:16:21 +0200
From:   Linus Walleij <linus.walleij@...aro.org>
To:     Linus Torvalds <torvalds@...ux-foundation.org>
Cc:     linux-kernel <linux-kernel@...r.kernel.org>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>
Subject: [GIT PULL] Pin control fixes for the v5.7 series

Hi Linus,

here is a bunch of pin control fixes, some a bit overly ripe,
sorry about that. We have important systems like Intel
laptops and Qualcomm mobile chips covered.

Details in the signed tag.

Please pull it in!

Yours,
Linus Walleij

The following changes since commit 8f3d9f354286745c751374f5f1fcafee6b3f3136:

  Linux 5.7-rc1 (2020-04-12 12:35:55 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git
tags/pinctrl-v5.7-2

for you to fetch changes up to dca4f40742e09ec5d908a7fc2862498e6cf9d911:

  pinctrl: qcom: Add affinity callbacks to msmgpio IRQ chip
(2020-05-12 14:29:29 +0200)

----------------------------------------------------------------
Pin control fixes for the v5.7 series:

- Pad lock register on Intel Sunrisepoint had the wrong offset.
- Fix pin config setting for the Baytrail GPIO chip.
- Fix a compilation warning in the Mediatek driver.
- Fix a function group name in the Actions driver.
- Fix a behaviour bug in the edge polarity code in the Qualcomm
  driver.
- Add a missing spinlock in the Intel Cherryview driver.
- Add affinity callbacks to the Qualcomm MSMGPIO chip.

----------------------------------------------------------------
Amit Singh Tomar (1):
      pinctrl: actions: fix function group name for i2c0_group

Andy Shevchenko (2):
      pinctrl: sunrisepoint: Fix PAD lock register offset for SPT-H
      pinctrl: baytrail: Enable pin configuration setting for GPIO chip

Ansuel Smith (1):
      pinctrl: qcom: fix wrong write in update_dual_edge

Grace Kao (1):
      pinctrl: cherryview: Add missing spinlock usage in chv_gpio_irq_handler

Light Hsieh (1):
      pinctrl: mediatek: remove shadow variable declaration

Linus Walleij (1):
      Merge tag 'intel-pinctrl-v5.7-2' of
git://git.kernel.org/.../pinctrl/intel into fixes

Venkata Narendra Kumar Gutta (1):
      pinctrl: qcom: Add affinity callbacks to msmgpio IRQ chip

 drivers/pinctrl/actions/pinctrl-s700.c       |  2 +-
 drivers/pinctrl/intel/pinctrl-baytrail.c     |  1 +
 drivers/pinctrl/intel/pinctrl-cherryview.c   |  4 ++++
 drivers/pinctrl/intel/pinctrl-sunrisepoint.c | 15 ++++++++-------
 drivers/pinctrl/mediatek/pinctrl-paris.c     |  2 --
 drivers/pinctrl/qcom/pinctrl-msm.c           | 27 ++++++++++++++++++++++++++-
 6 files changed, 40 insertions(+), 11 deletions(-)

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ