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Message-Id: <20200516124857.75004-1-lecopzer@gmail.com>
Date: Sat, 16 May 2020 20:48:54 +0800
From: Lecopzer Chen <lecopzer@...il.com>
To: linux-kernel@...r.kernel.org
Cc: lecopzer.chen@...iatek.com, linux-arm-kernel@...ts.infradead.org,
matthias.bgg@...il.com, catalin.marinas@....com, will@...nel.org,
mark.rutland@....com, mingo@...hat.com, acme@...nel.org,
jolsa@...hat.com, namhyung@...nel.org,
linux-mediatek@...ts.infradead.org,
alexander.shishkin@...ux.intel.com, peterz@...radead.org,
yj.chiang@...iatek.com, Lecopzer Chen <lecopzer@...il.com>
Subject: [PATCH 0/3] arm64: perf: Add support for Perf NMI interrupts
These series implement Perf NMI funxtionality and depends on
Pseudo NMI [1] which has been upstreamed.
In arm64 with GICv3, Pseudo NMI was implemented for NMI-like interruts.
That can be extended to Perf NMI which is the prerequisite for hard-lockup
detector which had already a standard interface inside Linux.
Thus the first step we need to implement perf NMI interface and make sure
it works fine.
Perf NMI has been test by dd if=/dev/urandom of=/dev/null like the link [2]
did.
[1] https://lkml.org/lkml/2019/1/31/535
[2] https://www.linaro.org/blog/debugging-arm-kernels-using-nmifiq
Lecopzer Chen (3):
arm_pmu: Add support for perf NMI interrupts registration
arm64: perf: Support NMI context for perf event ISR
arm64: Kconfig: Add support for the Perf NMI
arch/arm64/Kconfig | 10 +++++++
arch/arm64/kernel/perf_event.c | 36 ++++++++++++++++++------
drivers/perf/arm_pmu.c | 51 ++++++++++++++++++++++++++++++----
include/linux/perf/arm_pmu.h | 6 ++++
4 files changed, 88 insertions(+), 15 deletions(-)
--
2.25.1
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