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Message-ID: <20200516140627.zwigqoz335lhkxns@mobilestation>
Date: Sat, 16 May 2020 17:06:27 +0300
From: Serge Semin <Sergey.Semin@...kalelectronics.ru>
To: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
CC: Serge Semin <fancer.lancer@...il.com>,
Mark Brown <broonie@...nel.org>,
Georgy Vlasov <Georgy.Vlasov@...kalelectronics.ru>,
Ramil Zaripov <Ramil.Zaripov@...kalelectronics.ru>,
Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
Paul Burton <paulburton@...nel.org>,
Ralf Baechle <ralf@...ux-mips.org>,
Arnd Bergmann <arnd@...db.de>,
Allison Randal <allison@...utok.net>,
Gareth Williams <gareth.williams.jx@...esas.com>,
Rob Herring <robh+dt@...nel.org>, <linux-mips@...r.kernel.org>,
<devicetree@...r.kernel.org>,
Jarkko Nikula <jarkko.nikula@...ux.intel.com>,
Thomas Gleixner <tglx@...utronix.de>,
Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@...el.com>,
<linux-spi@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 05/19] spi: dw: Enable interrupts in accordance with
DMA xfer mode
On Fri, May 15, 2020 at 03:27:00PM +0300, Andy Shevchenko wrote:
> On Fri, May 15, 2020 at 01:47:44PM +0300, Serge Semin wrote:
> > It's pointless to track the Tx overrun interrupts if Rx-only SPI
> > transfer is issued. Similarly there is no need in handling the Rx
> > overrun/underrun interrupts if Tx-only SPI transfer is executed.
> > So lets unmask the interrupts only if corresponding SPI
> > transactions are implied.
>
> My comments below.
>
> > Co-developed-by: Georgy Vlasov <Georgy.Vlasov@...kalelectronics.ru>
> > Signed-off-by: Georgy Vlasov <Georgy.Vlasov@...kalelectronics.ru>
> > Signed-off-by: Serge Semin <Sergey.Semin@...kalelectronics.ru>
> > Cc: Ramil Zaripov <Ramil.Zaripov@...kalelectronics.ru>
> > Cc: Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>
> > Cc: Thomas Bogendoerfer <tsbogend@...ha.franken.de>
> > Cc: Paul Burton <paulburton@...nel.org>
> > Cc: Ralf Baechle <ralf@...ux-mips.org>
> > Cc: Arnd Bergmann <arnd@...db.de>
> > Cc: Allison Randal <allison@...utok.net>
> > Cc: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
> > Cc: Gareth Williams <gareth.williams.jx@...esas.com>
> > Cc: Rob Herring <robh+dt@...nel.org>
> > Cc: linux-mips@...r.kernel.org
> > Cc: devicetree@...r.kernel.org
>
> I think you really need to revisit Cc list in all patches (DT people hardly
> interested in this one, though ones where properties are being used might be
> point of interest).
>
> ...
>
> > /* Set the interrupt mask */
> > - spi_umask_intr(dws, SPI_INT_TXOI | SPI_INT_RXUI | SPI_INT_RXOI);
> > + spi_umask_intr(dws, imr);
>
> Can we rather do like this
>
> /* Set the interrupt mask */
> if (xfer->tx_buf)
> imr |= SPI_INT_TXOI;
> if (xfer->rx_buf)
> imr |= SPI_INT_RXUI | SPI_INT_RXOI;
> spi_umask_intr(dws, imr);
>
> ?
>
> (First block sets DMA, second one IRQ)
I'd rather leave it as is.
-Sergey
>
> --
> With Best Regards,
> Andy Shevchenko
>
>
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