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Message-Id: <1589778529-25627-1-git-send-email-maobibo@loongson.cn>
Date: Mon, 18 May 2020 13:08:47 +0800
From: Bibo Mao <maobibo@...ngson.cn>
To: Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
Jiaxun Yang <jiaxun.yang@...goat.com>,
Huacai Chen <chenhc@...ote.com>,
Andrew Morton <akpm@...ux-foundation.org>,
Paul Burton <paulburton@...nel.org>,
Dmitry Korotin <dkorotin@...ecomp.com>,
Philippe Mathieu-Daudé <f4bug@...at.org>,
Stafford Horne <shorne@...il.com>,
Steven Price <steven.price@....com>,
Anshuman Khandual <anshuman.khandual@....com>
Cc: linux-mips@...r.kernel.org, linux-kernel@...r.kernel.org,
Mike Rapoport <rppt@...ux.ibm.com>,
Sergei Shtylyov <sergei.shtylyov@...entembedded.com>,
"Maciej W. Rozycki" <macro@....com>, linux-mm@...ck.org,
David Hildenbrand <david@...hat.com>
Subject: [PATCH v3 1/3] MIPS: Do not flush tlb page when updating PTE entry
It is not necessary to flush tlb page on all CPUs if suitable PTE
entry exists already during page fault handling, just updating
TLB is fine.
Here redefine flush_tlb_fix_spurious_fault as empty on MIPS system.
Change in v2:
- split flush_tlb_fix_spurious_fault and tlb update into two patches
- comments typo modification
- separate tlb update and add pte readable privilege into two patches
Change in V3:
- add detailed changelog, modify typo issue in patch V2
Signed-off-by: Bibo Mao <maobibo@...ngson.cn>
---
arch/mips/include/asm/pgtable.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/mips/include/asm/pgtable.h b/arch/mips/include/asm/pgtable.h
index 9b01d2d..0d625c2 100644
--- a/arch/mips/include/asm/pgtable.h
+++ b/arch/mips/include/asm/pgtable.h
@@ -478,6 +478,8 @@ static inline pgprot_t pgprot_writecombine(pgprot_t _prot)
return __pgprot(prot);
}
+#define flush_tlb_fix_spurious_fault(vma, address) do { } while (0)
+
/*
* Conversion functions: convert a page and protection to a page entry,
* and a page entry and page directory to the page they refer to.
--
1.8.3.1
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