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Message-ID: <AM6PR04MB4966DD209B9A9C244427A75F80B80@AM6PR04MB4966.eurprd04.prod.outlook.com>
Date:   Mon, 18 May 2020 06:00:17 +0000
From:   Aisheng Dong <aisheng.dong@....com>
To:     Anson Huang <anson.huang@....com>,
        "thierry.reding@...il.com" <thierry.reding@...il.com>,
        "u.kleine-koenig@...gutronix.de" <u.kleine-koenig@...gutronix.de>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        "s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
        "kernel@...gutronix.de" <kernel@...gutronix.de>,
        "festevam@...il.com" <festevam@...il.com>,
        "p.zabel@...gutronix.de" <p.zabel@...gutronix.de>,
        "linux-pwm@...r.kernel.org" <linux-pwm@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
CC:     dl-linux-imx <linux-imx@....com>
Subject: RE: [PATCH 2/2] dt-bindings: pwm: Convert imx tpm pwm to json-schema

> From: Anson Huang <Anson.Huang@....com>
> Sent: Thursday, May 14, 2020 2:54 PM
> 
> Convert the imx tpm pwm binding to DT schema format using json-schema.
> 
> Signed-off-by: Anson Huang <Anson.Huang@....com>
> ---
>  .../devicetree/bindings/pwm/imx-tpm-pwm.txt        | 22 ---------
>  .../devicetree/bindings/pwm/imx-tpm-pwm.yaml       | 55
> ++++++++++++++++++++++
>  2 files changed, 55 insertions(+), 22 deletions(-)  delete mode 100644
> Documentation/devicetree/bindings/pwm/imx-tpm-pwm.txt
>  create mode 100644
> Documentation/devicetree/bindings/pwm/imx-tpm-pwm.yaml
> 
> diff --git a/Documentation/devicetree/bindings/pwm/imx-tpm-pwm.txt
> b/Documentation/devicetree/bindings/pwm/imx-tpm-pwm.txt
> deleted file mode 100644
> index 5bf2095..0000000
> --- a/Documentation/devicetree/bindings/pwm/imx-tpm-pwm.txt
> +++ /dev/null
> @@ -1,22 +0,0 @@
> -Freescale i.MX TPM PWM controller
> -
> -Required properties:
> -- compatible : Should be "fsl,imx7ulp-pwm".
> -- reg: Physical base address and length of the controller's registers.
> -- #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of
> the cells format.
> -- clocks : The clock provided by the SoC to drive the PWM.
> -- interrupts: The interrupt for the PWM controller.
> -
> -Note: The TPM counter and period counter are shared between multiple
> channels, so all channels -should use same period setting.
> -
> -Example:
> -
> -tpm4: pwm@...50000 {
> -	compatible = "fsl,imx7ulp-pwm";
> -	reg = <0x40250000 0x1000>;
> -	assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
> -	assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
> -	clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
> -	#pwm-cells = <3>;
> -};
> diff --git a/Documentation/devicetree/bindings/pwm/imx-tpm-pwm.yaml
> b/Documentation/devicetree/bindings/pwm/imx-tpm-pwm.yaml
> new file mode 100644
> index 0000000..fe9ef42
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/imx-tpm-pwm.yaml
> @@ -0,0 +1,55 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
> +---
> +$id:
> +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevice
> +tree.org%2Fschemas%2Fpwm%2Fimx-tpm-pwm.yaml%23&amp;data=02%7C
> 01%7Caishe
> +ng.dong%40nxp.com%7C8dba0c8c150b4885913008d7f7d5320d%7C686ea
> 1d3bc2b4c6f
> +a92cd99c5c301635%7C0%7C0%7C637250367345109522&amp;sdata=WT6
> kA9lpZMBYgS7
> +whY9rlVq5qDcGZYheOHoTR8nupOY%3D&amp;reserved=0
> +$schema:
> +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevice
> +tree.org%2Fmeta-schemas%2Fcore.yaml%23&amp;data=02%7C01%7Caishen
> g.dong%
> +40nxp.com%7C8dba0c8c150b4885913008d7f7d5320d%7C686ea1d3bc2b4c
> 6fa92cd99c
> +5c301635%7C0%7C0%7C637250367345109522&amp;sdata=AlzT4bC3GZgV
> cDJn5svMqjt
> +5HN7Lj60Fc7m%2B3D0g0xQ%3D&amp;reserved=0
> +
> +title: Freescale i.MX TPM PWM controller
> +
> +maintainers:
> +  - Anson Huang <anson.huang@....com>
> +
> +description: |
> +  The TPM counter and period counter are shared between multiple
> +  channels, so all channels should use same period setting.
> +
> +properties:
> +  "#pwm-cells":
> +    const: 3
> +

Same issue, missing the reference to pwm.yaml?


> +  compatible:
> +    enum:
> +      - fsl,imx7ulp-pwm
> +
> +  reg:
> +    maxItems: 1
> +
> +  assigned-clocks:
> +    maxItems: 1
> +
> +  assigned-clock-parents:
> +    maxItems: 1
> +
> +  clocks:
> +    maxItems: 1
> +
> +required:
> +  - "#pwm-cells"
> +  - compatible
> +  - reg
> +  - clocks
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/imx7ulp-clock.h>
> +
> +    pwm@...50000 {
> +        compatible = "fsl,imx7ulp-pwm";
> +        reg = <0x40250000 0x1000>;
> +        assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
> +        assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
> +        clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
> +        #pwm-cells = <3>;
> +    };
> --
> 2.7.4

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