linux-kernel - Re: [PATCH v2 09/19] spi: dw: Parameterize the DMA Rx/Tx burst length

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Date:   Mon, 18 May 2020 15:41:02 +0300
From:   Serge Semin <Sergey.Semin@...kalelectronics.ru>
To:     Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
CC:     Serge Semin <fancer.lancer@...il.com>,
        Mark Brown <broonie@...nel.org>,
        Georgy Vlasov <Georgy.Vlasov@...kalelectronics.ru>,
        Ramil Zaripov <Ramil.Zaripov@...kalelectronics.ru>,
        Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>,
        Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
        Paul Burton <paulburton@...nel.org>,
        Ralf Baechle <ralf@...ux-mips.org>,
        Arnd Bergmann <arnd@...db.de>,
        Allison Randal <allison@...utok.net>,
        Gareth Williams <gareth.williams.jx@...esas.com>,
        Rob Herring <robh+dt@...nel.org>, <linux-mips@...r.kernel.org>,
        <devicetree@...r.kernel.org>, Thomas Gleixner <tglx@...utronix.de>,
        Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@...el.com>,
        Jarkko Nikula <jarkko.nikula@...ux.intel.com>,
        <linux-spi@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 09/19] spi: dw: Parameterize the DMA Rx/Tx burst length

On Mon, May 18, 2020 at 02:01:50PM +0300, Andy Shevchenko wrote:
> On Sat, May 16, 2020 at 05:33:53PM +0300, Serge Semin wrote:
> > On Fri, May 15, 2020 at 05:01:29PM +0300, Andy Shevchenko wrote:
> > > On Fri, May 15, 2020 at 01:47:48PM +0300, Serge Semin wrote:
> > > > It isn't good to have numeric literals in the code especially if there
> > > > are multiple of them and they are related. Moreover in current
> > > > implementation the Tx DMA transfer activation level isn't optimal,
> > > > since it's hardwired to be at 16-32 bytes level, while it's better
> > > > to keep the SPI FIFO buffer as full as possible until all available
> > > > data is submitted. So lets introduce the DMA burst level
> > > > parametrization macros with optimal values - issue Rx transfer if at
> > > > least 16 bytes are available in the buffer and execute Tx transaction
> > > > if at least 16 bytes room is opened in SPI Tx FIFO.
> > > 
> > > > -	dw_writel(dws, DW_SPI_DMARDLR, 0xf);
> > > > -	dw_writel(dws, DW_SPI_DMATDLR, 0x10);
> > > > +	dw_writel(dws, DW_SPI_DMARDLR, RX_BURST_LEVEL - 1);
> > > > +	dw_writel(dws, DW_SPI_DMATDLR, dws->fifo_len - TX_BURST_LEVEL);
> > > 
> > > ...and if FIFO length is less than TX_BURST_LEVEL?
> > > 
> > > For the patch that introduces definitions, i.e. keeping the last line here as
> > > 
> > > 	dw_writel(dws, DW_SPI_DMATDLR, TX_BURST_LEVEL);
> > > 
> > > I'm good. You may put your tag in that case. For fifo_len case we need to
> > > discuss in separate patch, perhaps.
> > 
> > It's fixed in a consequent patch anyway. Though if v3 is required I'll remove
> > this change from here.
> 
> I consider that here you might have introduced a regression and actually doing
> two things in one patch. Why not to split?

Theoretically I could, but only for a hardware with FIFO smaller than 16 bytes.
So did I, seeing this module has been dedicated for the Intel Medfield/Elkhart chips
only?

Anyway as I said this change is mostly redundant, since further in this patchset I'll
replace the constants used here with burst length properly calculated based on the
fifo-length and max-burst-length specific to the DMA.

-Sergey

> 
> -- 
> With Best Regards,
> Andy Shevchenko
> 
>