linux-kernel - Re: [PATCH v12 00/18] Enable FSGSBASE instructions

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Message-ID: <20200518153407.GA499505@tassilo.jf.intel.com>
Date:   Mon, 18 May 2020 08:34:07 -0700
From:   Andi Kleen <ak@...ux.intel.com>
To:     Jarkko Sakkinen <jarkko.sakkinen@...ux.intel.com>
Cc:     Sasha Levin <sashal@...nel.org>, linux-kernel@...r.kernel.org,
        tglx@...utronix.de, bp@...en8.de, luto@...nel.org, hpa@...or.com,
        dave.hansen@...el.com, tony.luck@...el.com,
        ravi.v.shankar@...el.com, chang.seok.bae@...el.com
Subject: Re: [PATCH v12 00/18] Enable FSGSBASE instructions

> Yes, for SGX this is functional feature because enclave entry points,
> thread control structures (aka TCS's), reset FSBASE and GSBASE registers
> to fixed (albeit user defined) values. And syscall's can be done only
> outside of enclave.
> 
> This is a required feature for fancier runtimes (such as Graphene).

Can you please explain a bit more? What do they need GS for?

-Andi