lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Tue, 19 May 2020 08:34:21 +0800
From:   Caesar Wang <wxt@...k-chips.com>
To:     Heiko Stübner <heiko@...ech.de>,
        Johan Jonker <jbx6244@...il.com>, kever.yang@...k-chips.com
Cc:     robh+dt@...nel.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 2/2] arm64: dts: rockchip: rk3399: fix pd_tcpc0 and
 pd_tcpc1 node position

Hi Heiko,

在 2020/5/19 上午6:29, Heiko Stübner 写道:
> Hi Kever, Caesar,
>
> could you double check where the type-c power-domains are located
> in the power-tree, as Caesar did add them under pd_vio back in 2016.

Johan's patch is correct, the pd_tcpc0 and pd_tcpc1 are grouped by VDD_LOGIC.
I have a passed test for pd_vio without pd_tcpc*.

>
> Thanks
> Heiko
>
> Am Dienstag, 28. April 2020, 22:30:03 CEST schrieb Johan Jonker:
>> The pd_tcpc0 and pd_tcpc1 nodes are currently a sub node of pd_vio.
>> In the rk3399 TRM figure of the 'Power Domain Partition' and in the
>> table of 'Power Domain and Voltage Domain Summary' these power domains
>> are positioned directly under VD_LOGIC, so fix that in 'rk3399.dtsi'.
>>
>> Signed-off-by: Johan Jonker <jbx6244@...il.com>


Reviewed-by: Caesar Wang <wxt@...k-chips.com>

Thanks,

-Caesar

>> ---
>>   arch/arm64/boot/dts/rockchip/rk3399.dtsi | 20 ++++++++++----------
>>   1 file changed, 10 insertions(+), 10 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> index 37279db53..a4dc1bf2e 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> @@ -1056,6 +1056,16 @@
>>   				clocks = <&cru HCLK_SDIO>;
>>   				pm_qos = <&qos_sdioaudio>;
>>   			};
>> +			pd_tcpc0@...399_PD_TCPD0 {
>> +				reg = <RK3399_PD_TCPD0>;
>> +				clocks = <&cru SCLK_UPHY0_TCPDCORE>,
>> +					 <&cru SCLK_UPHY0_TCPDPHY_REF>;
>> +			};
>> +			pd_tcpc1@...399_PD_TCPD1 {
>> +				reg = <RK3399_PD_TCPD1>;
>> +				clocks = <&cru SCLK_UPHY1_TCPDCORE>,
>> +					 <&cru SCLK_UPHY1_TCPDPHY_REF>;
>> +			};
>>   			pd_usb3@...399_PD_USB3 {
>>   				reg = <RK3399_PD_USB3>;
>>   				clocks = <&cru ACLK_USB3>;
>> @@ -1088,16 +1098,6 @@
>>   					pm_qos = <&qos_isp1_m0>,
>>   						 <&qos_isp1_m1>;
>>   				};
>> -				pd_tcpc0@...399_PD_TCPD0 {
>> -					reg = <RK3399_PD_TCPD0>;
>> -					clocks = <&cru SCLK_UPHY0_TCPDCORE>,
>> -						 <&cru SCLK_UPHY0_TCPDPHY_REF>;
>> -				};
>> -				pd_tcpc1@...399_PD_TCPD1 {
>> -					reg = <RK3399_PD_TCPD1>;
>> -					clocks = <&cru SCLK_UPHY1_TCPDCORE>,
>> -						 <&cru SCLK_UPHY1_TCPDPHY_REF>;
>> -				};
>>   				pd_vo@...399_PD_VO {
>>   					reg = <RK3399_PD_VO>;
>>   					#address-cells = <1>;
>>
>
>
>
>
>


Powered by blists - more mailing lists