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Message-ID: <0c9becaf-2bc6-e094-a3ee-7b67a5eb82cd@arm.com>
Date:   Tue, 19 May 2020 11:50:54 +0100
From:   Suzuki K Poulose <suzuki.poulose@....com>
To:     anshuman.khandual@....com, linux-arm-kernel@...ts.infradead.org
Cc:     catalin.marinas@....com, will@...nel.org, maz@...nel.org,
        mark.rutland@....com, james.morse@....com,
        kvmarm@...ts.cs.columbia.edu, linux-kernel@...r.kernel.org
Subject: Re: [PATCH V4 06/17] arm64/cpufeature: Introduce ID_MMFR5 CPU
 register

On 05/19/2020 10:40 AM, Anshuman Khandual wrote:
> This adds basic building blocks required for ID_MMFR5 CPU register which
> provides information about the implemented memory model and memory
> management support in AArch32 state. This is added per ARM DDI 0487F.a
> specification.
> 
> Cc: Catalin Marinas <catalin.marinas@....com>
> Cc: Will Deacon <will@...nel.org>
> Cc: Marc Zyngier <maz@...nel.org>
> Cc: Mark Rutland <mark.rutland@....com>
> Cc: James Morse <james.morse@....com>
> Cc: Suzuki K Poulose <suzuki.poulose@....com>
> Cc: kvmarm@...ts.cs.columbia.edu
> Cc: linux-arm-kernel@...ts.infradead.org
> Cc: linux-kernel@...r.kernel.org
> 
> Suggested-by: Will Deacon <will@...nel.org>
> Signed-off-by: Anshuman Khandual <anshuman.khandual@....com>

Reviewed-by: Suzuki K Poulose <suzuki.poulose@....com>

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