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Message-ID: <6ef6e9d0-d344-b482-4430-0d720b52ea7b@intel.com>
Date: Tue, 19 May 2020 20:28:45 +0800
From: "Xu, Like" <like.xu@...el.com>
To: Peter Zijlstra <peterz@...radead.org>,
Like Xu <like.xu@...ux.intel.com>
Cc: Paolo Bonzini <pbonzini@...hat.com>, linux-kernel@...r.kernel.org,
kvm@...r.kernel.org,
Sean Christopherson <sean.j.christopherson@...el.com>,
Vitaly Kuznetsov <vkuznets@...hat.com>,
Wanpeng Li <wanpengli@...cent.com>,
Jim Mattson <jmattson@...gle.com>,
Joerg Roedel <joro@...tes.org>,
Thomas Gleixner <tglx@...utronix.de>, ak@...ux.intel.com,
wei.w.wang@...el.com
Subject: Re: [PATCH v11 08/11] KVM: x86/pmu: Emulate LBR feature via guest LBR
event
On 2020/5/19 19:01, Peter Zijlstra wrote:
> On Thu, May 14, 2020 at 04:30:51PM +0800, Like Xu wrote:
>
>> + struct perf_event_attr attr = {
>> + .type = PERF_TYPE_RAW,
>> + .size = sizeof(attr),
>> + .pinned = true,
>> + .exclude_host = true,
>> + .config = INTEL_FIXED_VLBR_EVENT,
>> + .sample_type = PERF_SAMPLE_BRANCH_STACK,
>> + .branch_sample_type = PERF_SAMPLE_BRANCH_CALL_STACK |
>> + PERF_SAMPLE_BRANCH_USER,
> Maybe order the fields according to how they're declared in the
> structure?
Sure, I'll sort the fields in the order of declaration. Thanks.
>> + };
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