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Message-ID: <202005200234.jVWnvx1l%lkp@intel.com>
Date: Wed, 20 May 2020 02:21:27 +0800
From: kbuild test robot <lkp@...el.com>
To: 周琰杰 (Zhou Yanjie)
<zhouyanjie@...yeetech.com>, linux-mips@...r.kernel.org
Cc: kbuild-all@...ts.01.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, tsbogend@...ha.franken.de,
paulburton@...nel.org, jiaxun.yang@...goat.com, chenhc@...ote.com,
tglx@...utronix.de, robh+dt@...nel.org, daniel.lezcano@...aro.org
Subject: Re: [PATCH v8 1/6] MIPS: JZ4780: Introduce SMP support.
Hi "周琰杰,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on robh/for-next]
[also build test WARNING on tip/timers/core linus/master v5.7-rc6]
[cannot apply to linux/master next-20200518]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url: https://github.com/0day-ci/linux/commits/Zhou-Yanjie/Introduce-SMP-support-for-CI20-based-on-JZ4780/20200519-224008
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: mips-allyesconfig (attached as .config)
compiler: mips-linux-gcc (GCC) 9.3.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=mips
If you fix the issue, kindly add following tag as appropriate
Reported-by: kbuild test robot <lkp@...el.com>
All warnings (new ones prefixed by >>, old ones prefixed by <<):
>> arch/mips/kernel/idle.c:97:6: warning: no previous prototype for 'jz4780_smp_wait_irqoff' [-Wmissing-prototypes]
97 | void jz4780_smp_wait_irqoff(void)
| ^~~~~~~~~~~~~~~~~~~~~~
arch/mips/kernel/idle.c:155:13: warning: no previous prototype for 'check_wait' [-Wmissing-prototypes]
155 | void __init check_wait(void)
| ^~~~~~~~~~
vim +/jz4780_smp_wait_irqoff +97 arch/mips/kernel/idle.c
90
91 /*
92 * The Ingenic jz4780 SMP variant has to write back dirty cache lines before
93 * executing wait. The CPU & cache clock will be gated until we return from
94 * the wait, and if another core attempts to access data from our data cache
95 * during this time then it will lock up.
96 */
> 97 void jz4780_smp_wait_irqoff(void)
98 {
99 unsigned long pending = read_c0_cause() & read_c0_status() & CAUSEF_IP;
100
101 /*
102 * Going to idle has a significant overhead due to the cache flush so
103 * try to avoid it if we'll immediately be woken again due to an IRQ.
104 */
105 if (!need_resched() && !pending) {
106 r4k_blast_dcache();
107
108 __asm__(
109 " .set push \n"
110 " .set mips3 \n"
111 " sync \n"
112 " wait \n"
113 " .set pop \n");
114 }
115
116 local_irq_enable();
117 }
118
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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