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Message-Id: <1589940278-3680-4-git-send-email-peng.fan@nxp.com>
Date: Wed, 20 May 2020 10:04:38 +0800
From: peng.fan@....com
To: shawnguo@...nel.org, fabio.estevam@....com, kernel@...gutronix.de,
aisheng.dong@....com, robh+dt@...nel.org, sboyd@...nel.org
Cc: linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-imx@....com, leonard.crestez@....com, daniel.baluta@....com,
l.stach@...gutronix.de, devicetree@...r.kernel.org,
linux-clk@...r.kernel.org, Peng Fan <peng.fan@....com>
Subject: [PATCH 3/3] arm64: dts: imx8mp: add mu node
From: Peng Fan <peng.fan@....com>
Add mu node to let A53 could communicate with M Core.
Signed-off-by: Peng Fan <peng.fan@....com>
---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 73535601261e..0b127a25657a 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -621,6 +621,15 @@
status = "disabled";
};
+ mu: mailbox@...a0000 {
+ compatible = "fsl,imx6sx-mu";
+ reg = <0x30aa0000 0x10000>;
+ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MP_CLK_MU_ROOT>;
+ clock-names = "mu";
+ #mbox-cells = <2>;
+ };
+
i2c5: i2c@...d0000 {
compatible = "fsl,imx8mp-i2c", "fsl,imx21-i2c";
#address-cells = <1>;
--
2.16.4
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