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Message-ID: <20200520210244.GA575238@bogus>
Date: Wed, 20 May 2020 15:02:44 -0600
From: Rob Herring <robh@...nel.org>
To: Kishon Vijay Abraham I <kishon@...com>
Cc: Tom Joseph <tjoseph@...ence.com>,
linux-arm-kernel@...ts.infradead.org,
Bjorn Helgaas <bhelgaas@...gle.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
devicetree@...r.kernel.org,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Rob Herring <robh+dt@...nel.org>,
Arnd Bergmann <arnd@...db.de>, linux-pci@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-omap@...r.kernel.org
Subject: Re: [PATCH v4 03/14] PCI: cadence: Add support to use custom read
and write accessors
On Wed, 6 May 2020 20:44:18 +0530, Kishon Vijay Abraham I wrote:
> Add support to use custom read and write accessors. Platforms that
> don't support half word or byte access or any other constraint
> while accessing registers can use this feature to populate custom
> read and write accessors. These custom accessors are used for both
> standard register access and configuration space register access of
> the PCIe host bridge.
>
> Signed-off-by: Kishon Vijay Abraham I <kishon@...com>
> ---
> drivers/pci/controller/cadence/pcie-cadence.h | 107 +++++++++++++++---
> 1 file changed, 94 insertions(+), 13 deletions(-)
>
Reviewed-by: Rob Herring <robh@...nel.org>
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