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Date:   Wed, 20 May 2020 14:16:21 +0200
From:   Borislav Petkov <bp@...en8.de>
To:     Jarkko Sakkinen <jarkko.sakkinen@...ux.intel.com>
Cc:     linux-kernel@...r.kernel.org, x86@...nel.org,
        linux-sgx@...r.kernel.org, akpm@...ux-foundation.org,
        dave.hansen@...el.com, sean.j.christopherson@...el.com,
        nhorman@...hat.com, npmccallum@...hat.com, haitao.huang@...el.com,
        andriy.shevchenko@...ux.intel.com, tglx@...utronix.de,
        kai.svahn@...el.com, josh@...htriplett.org, luto@...nel.org,
        kai.huang@...el.com, rientjes@...gle.com, cedric.xing@...el.com,
        puiterwijk@...hat.com, Jethro Beekman <jethro@...tanix.com>
Subject: Re: [PATCH v30 01/20] x86/cpufeatures: x86/msr: Add Intel SGX
 hardware bits

On Fri, May 15, 2020 at 03:43:51AM +0300, Jarkko Sakkinen wrote:
> From: Sean Christopherson <sean.j.christopherson@...el.com>
> 
> Add X86_FEATURE_SGX from CPUID.(EAX=7, ECX=1), which informs whether the
> CPU has SGX.
> 
> Add X86_FEATURE_SGX1 and X86_FEATURE_SGX2 from CPUID.(EAX=12H, ECX=0),
> which describe the level of SGX support available [1].
> 
> Remap CPUID.(EAX=12H, ECX=0) bits to the Linux fake CPUID 8 in order to
> conserve some space. Keep the bit positions intact because KVM requires
> this. Reserve bits 0-7 for SGX in order to maintain this invariant also
> when new SGX specific feature bits get added.

That paragraph needs dropping now.

-- 
Regards/Gruss,
    Boris.

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