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Message-ID: <3be71452-abd3-cd6f-c859-697447657a3f@arm.com>
Date: Wed, 20 May 2020 14:56:09 +0100
From: Suzuki K Poulose <suzuki.poulose@....com>
To: anshuman.khandual@....com, linux-arm-kernel@...ts.infradead.org
Cc: catalin.marinas@....com, will@...nel.org, maz@...nel.org,
mark.rutland@....com, linux-kernel@...r.kernel.org
Subject: Re: [PATCH V4 14/17] arm64/cpufeature: Add remaining feature bits in
ID_AA64MMFR2 register
On 05/19/2020 10:40 AM, Anshuman Khandual wrote:
> Enable EVT, BBM, TTL, IDS, ST, NV and CCIDX features bits in ID_AA64MMFR2
> register as per ARM DDI 0487F.a specification.
>
> Cc: Catalin Marinas <catalin.marinas@....com>
> Cc: Will Deacon <will@...nel.org>
> Cc: Mark Rutland <mark.rutland@....com>
> Cc: Suzuki K Poulose <suzuki.poulose@....com>
> Cc: linux-arm-kernel@...ts.infradead.org
> Cc: linux-kernel@...r.kernel.org
>
> Suggested-by: Will Deacon <will@...nel.org>
> Signed-off-by: Anshuman Khandual <anshuman.khandual@....com>
Please note that there other series addressing TTL. So might
have conflicts.
Reviewed-by: Suzuki K Poulose <suzuki.poulose@....com>
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