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Message-ID: <1e88d48ead56a1c75c3355f389fdb6dd@codeaurora.org>
Date:   Thu, 21 May 2020 09:07:41 +0530
From:   Sibi Sankar <sibis@...eaurora.org>
To:     Stephen Boyd <swboyd@...omium.org>
Cc:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
        Evan Green <evgreen@...omium.org>,
        linux-kernel-owner@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: qcom: sc7180: Move mss node to the right
 place

On 2020-05-21 06:33, Stephen Boyd wrote:
> The modem node has an address of 4080000 and thus should come after 
> tlmm
> and before gpu. Move the node to the right place to maintainer proper
> address sort order.
> 
> Cc: Evan Green <evgreen@...omium.org>
> Cc: Sibi Sankar <sibis@...eaurora.org>
> Fixes: e14a15eba89a ("arm64: dts: qcom: sc7180: Add Q6V5 MSS node")
> Signed-off-by: Stephen Boyd <swboyd@...omium.org>

Reviewed-by: Sibi Sankar <sibis@...eaurora.org>

> ---
>  arch/arm64/boot/dts/qcom/sc7180.dtsi | 102 +++++++++++++--------------
>  1 file changed, 51 insertions(+), 51 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> index 6b12c60c37fb..1027ef70f8db 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -1459,6 +1459,57 @@ pinconf-sd-cd {
>  			};
>  		};
> 
> +		remoteproc_mpss: remoteproc@...0000 {
> +			compatible = "qcom,sc7180-mpss-pas";
> +			reg = <0 0x04080000 0 0x4040>, <0 0x04180000 0 0x48>;
> +			reg-names = "qdsp6", "rmb";
> +
> +			interrupts-extended = <&intc GIC_SPI 266 IRQ_TYPE_EDGE_RISING>,
> +					      <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
> +					      <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
> +					      <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
> +					      <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
> +					      <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
> +			interrupt-names = "wdog", "fatal", "ready", "handover",
> +					  "stop-ack", "shutdown-ack";
> +
> +			clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
> +				 <&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>,
> +				 <&gcc GCC_MSS_NAV_AXI_CLK>,
> +				 <&gcc GCC_MSS_SNOC_AXI_CLK>,
> +				 <&gcc GCC_MSS_MFAB_AXIS_CLK>,
> +				 <&rpmhcc RPMH_CXO_CLK>;
> +			clock-names = "iface", "bus", "nav", "snoc_axi",
> +				      "mnoc_axi", "xo";
> +
> +			power-domains = <&aoss_qmp AOSS_QMP_LS_MODEM>,
> +					<&rpmhpd SC7180_CX>,
> +					<&rpmhpd SC7180_MX>,
> +					<&rpmhpd SC7180_MSS>;
> +			power-domain-names = "load_state", "cx", "mx", "mss";
> +
> +			memory-region = <&mpss_mem>;
> +
> +			qcom,smem-states = <&modem_smp2p_out 0>;
> +			qcom,smem-state-names = "stop";
> +
> +			resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
> +				 <&pdc_reset PDC_MODEM_SYNC_RESET>;
> +			reset-names = "mss_restart", "pdc_reset";
> +
> +			qcom,halt-regs = <&tcsr_mutex_regs 0x23000 0x25000 0x24000>;
> +			qcom,spare-regs = <&tcsr_regs 0xb3e4>;
> +
> +			status = "disabled";
> +
> +			glink-edge {
> +				interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>;
> +				label = "modem";
> +				qcom,remote-pid = <1>;
> +				mboxes = <&apss_shared 12>;
> +			};
> +		};
> +
>  		gpu: gpu@...0000 {
>  			compatible = "qcom,adreno-618.0", "qcom,adreno";
>  			#stream-id-cells = <16>;
> @@ -2054,57 +2105,6 @@ apss_merge_funnel_in: endpoint {
>  			};
>  		};
> 
> -		remoteproc_mpss: remoteproc@...0000 {
> -			compatible = "qcom,sc7180-mpss-pas";
> -			reg = <0 0x04080000 0 0x4040>, <0 0x04180000 0 0x48>;
> -			reg-names = "qdsp6", "rmb";
> -
> -			interrupts-extended = <&intc GIC_SPI 266 IRQ_TYPE_EDGE_RISING>,
> -					      <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
> -					      <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
> -					      <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
> -					      <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
> -					      <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
> -			interrupt-names = "wdog", "fatal", "ready", "handover",
> -					  "stop-ack", "shutdown-ack";
> -
> -			clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
> -				 <&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>,
> -				 <&gcc GCC_MSS_NAV_AXI_CLK>,
> -				 <&gcc GCC_MSS_SNOC_AXI_CLK>,
> -				 <&gcc GCC_MSS_MFAB_AXIS_CLK>,
> -				 <&rpmhcc RPMH_CXO_CLK>;
> -			clock-names = "iface", "bus", "nav", "snoc_axi",
> -				      "mnoc_axi", "xo";
> -
> -			power-domains = <&aoss_qmp AOSS_QMP_LS_MODEM>,
> -					<&rpmhpd SC7180_CX>,
> -					<&rpmhpd SC7180_MX>,
> -					<&rpmhpd SC7180_MSS>;
> -			power-domain-names = "load_state", "cx", "mx", "mss";
> -
> -			memory-region = <&mpss_mem>;
> -
> -			qcom,smem-states = <&modem_smp2p_out 0>;
> -			qcom,smem-state-names = "stop";
> -
> -			resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
> -				 <&pdc_reset PDC_MODEM_SYNC_RESET>;
> -			reset-names = "mss_restart", "pdc_reset";
> -
> -			qcom,halt-regs = <&tcsr_mutex_regs 0x23000 0x25000 0x24000>;
> -			qcom,spare-regs = <&tcsr_regs 0xb3e4>;
> -
> -			status = "disabled";
> -
> -			glink-edge {
> -				interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>;
> -				label = "modem";
> -				qcom,remote-pid = <1>;
> -				mboxes = <&apss_shared 12>;
> -			};
> -		};
> -
>  		sdhc_2: sdhci@...4000 {
>  			compatible = "qcom,sc7180-sdhci", "qcom,sdhci-msm-v5";
>  			reg = <0 0x08804000 0 0x1000>;
> 
> base-commit: d82fade846aa8bb34956120e3792f494058ec35e

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