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Message-ID: <20200521125225.odxcdjkoy5lckrbx@ti.com>
Date:   Thu, 21 May 2020 18:22:25 +0530
From:   Pratyush Yadav <p.yadav@...com>
To:     <masonccyang@...c.com.tw>
CC:     Alexandre Belloni <alexandre.belloni@...tlin.com>,
        Boris Brezillon <boris.brezillon@...labora.com>,
        Mark Brown <broonie@...nel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>,
        <linux-mediatek@...ts.infradead.org>,
        <linux-mtd@...ts.infradead.org>, <linux-spi@...r.kernel.org>,
        Ludovic Desroches <ludovic.desroches@...rochip.com>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Miquel Raynal <miquel.raynal@...tlin.com>,
        Nicolas Ferre <nicolas.ferre@...rochip.com>,
        Sekhar Nori <nsekhar@...com>,
        Richard Weinberger <richard@....at>,
        Tudor Ambarus <tudor.ambarus@...rochip.com>,
        Vignesh Raghavendra <vigneshr@...com>
Subject: Re: [PATCH v5 05/19] mtd: spi-nor: add support for DTR protocol

Hi,

On 21/05/20 05:24PM, masonccyang@...c.com.tw wrote:
> 
> Hi Pratyush,
> 
> 
> > @@ -311,6 +313,7 @@ struct flash_info {
> >                  * BP3 is bit 6 of status register.
> >                  * Must be used with SPI_NOR_4BIT_BP.
> >                  */
> > +#define SPI_NOR_OCTAL_DTR_READ   BIT(19) /* Flash supports octal DTR 
> Read. */
> 
> #define SPI_NOR_OCTAL_DTR_RDWR  BIT(19) /* Support Octal DTR Read & Write 
> */

This flag only enables SNOR_HWCAPS_READ_8_8_8_DTR. It does not affect 
SNOR_HWCAPS_PP_8_8_8_DTR. So it shouldn't be called RDWR.
 
> more precisely and clearly ?
> 
> thanks,
> Mason
> 

-- 
Regards,
Pratyush Yadav
Texas Instruments India

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