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Message-ID: <9517d625-f55e-c0f1-8e8d-b3882189e175@gmail.com>
Date: Thu, 21 May 2020 17:06:13 +0200
From: Matthias Brugger <matthias.bgg@...il.com>
To: Chunfeng Yun <chunfeng.yun@...iatek.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Rob Herring <robh+dt@...nel.org>
Cc: Mark Rutland <mark.rutland@....com>,
Mathias Nyman <mathias.nyman@...el.com>,
linux-usb@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 5/7] arm64: dts: mt8183: add usb and phy nodes
On 30/08/2019 09:40, Chunfeng Yun wrote:
> Add USB related nodes for MT8183, set it as host mode by default.
>
> Signed-off-by: Chunfeng Yun <chunfeng.yun@...iatek.com>
> ---
> v2~v3: no changes
> ---
> arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 22 +++++++++
> arch/arm64/boot/dts/mediatek/mt8183.dtsi | 55 +++++++++++++++++++++
> 2 files changed, 77 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
> index d8e555cbb5d3..142ff52f0f42 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
> +++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
> @@ -6,7 +6,9 @@
> */
>
> /dts-v1/;
> +#include <dt-bindings/gpio/gpio.h>
> #include "mt8183.dtsi"
> +#include "mt6358.dtsi"
mt6358.dtsi is accepted upstream now.
While the rest of the series implements wake up function, I understand that this
patch is independent and enables USB without wake up.
If so, let me know and I can take it now.
Regards,
Matthias
>
> / {
> model = "MediaTek MT8183 evaluation board";
> @@ -24,6 +26,16 @@
> chosen {
> stdout-path = "serial0:921600n8";
> };
> +
> + usb_vbus: regulator@0 {
> + compatible = "regulator-fixed";
> + regulator-name = "p0_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + gpio = <&pio 42 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> + regulator-always-on;
> + };
> };
>
> &auxadc {
> @@ -135,6 +147,16 @@
>
> };
>
> +&ssusb {
> + vusb33-supply = <&mt6358_vusb_reg>;
> + dr_mode = "host";
> + status = "okay";
> +};
> +
> +&usb_host {
> + status = "okay";
> +};
> +
> &uart0 {
> status = "okay";
> };
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index c2749c4631bc..28da334237c6 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -8,6 +8,7 @@
> #include <dt-bindings/clock/mt8183-clk.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/phy/phy.h>
> #include "mt8183-pinfunc.h"
>
> / {
> @@ -372,6 +373,35 @@
> status = "disabled";
> };
>
> + ssusb: usb@...01000 {
> + compatible = "mediatek,mt8183-mtu3", "mediatek,mtu3";
> + reg = <0 0x11201000 0 0x2e00>,
> + <0 0x11203e00 0 0x0100>;
> + reg-names = "mac", "ippc";
> + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_LOW>;
> + phys = <&u2port0 PHY_TYPE_USB2>,
> + <&u3port0 PHY_TYPE_USB3>;
> + clocks = <&infracfg CLK_INFRA_UNIPRO_SCK>,
> + <&infracfg CLK_INFRA_USB>;
> + clock-names = "sys_ck", "ref_ck";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> + status = "disabled";
> +
> + usb_host: xhci@...00000 {
> + compatible = "mediatek,mt8183-xhci",
> + "mediatek,mtk-xhci";
> + reg = <0 0x11200000 0 0x1000>;
> + reg-names = "mac";
> + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&infracfg CLK_INFRA_UNIPRO_SCK>,
> + <&infracfg CLK_INFRA_USB>;
> + clock-names = "sys_ck", "ref_ck";
> + status = "disabled";
> + };
> + };
> +
> audiosys: syscon@...20000 {
> compatible = "mediatek,mt8183-audiosys", "syscon";
> reg = <0 0x11220000 0 0x1000>;
> @@ -384,6 +414,31 @@
> reg = <0 0x11f10000 0 0x1000>;
> };
>
> + u3phy: usb-phy@...40000 {
> + compatible = "mediatek,mt8183-tphy",
> + "mediatek,generic-tphy-v2";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0 0x11f40000 0x1000>;
> + status = "okay";
> +
> + u2port0: usb-phy@0 {
> + reg = <0x0 0x700>;
> + clocks = <&clk26m>;
> + clock-names = "ref";
> + #phy-cells = <1>;
> + status = "okay";
> + };
> +
> + u3port0: usb-phy@...0 {
> + reg = <0x0700 0x900>;
> + clocks = <&clk26m>;
> + clock-names = "ref";
> + #phy-cells = <1>;
> + status = "okay";
> + };
> + };
> +
> mfgcfg: syscon@...00000 {
> compatible = "mediatek,mt8183-mfgcfg", "syscon";
> reg = <0 0x13000000 0 0x1000>;
>
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