Message-ID: <871dd2c1-4b16-f883-b8c5-806a0df1edf8@linaro.org>
Date:   Fri, 22 May 2020 12:18:51 +0100
From:   Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
To:     Doug Anderson <dianders@...omium.org>
Cc:     "Ravi Kumar Bokka (Temp)" <rbokka@...eaurora.org>,
        Rob Herring <robh+dt@...nel.org>,
        LKML <linux-kernel@...r.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        Rajendra Nayak <rnayak@...eaurora.org>,
        Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>,
        dhavalp@...eaurora.org, mturney@...eaurora.org,
        sparate@...eaurora.org, c_rbokka@...eaurora.org,
        mkurumel@...eaurora.org
Subject: Re: [RFC v1 2/3] drivers: nvmem: Add driver for QTI qfprom-efuse
 support



On 21/05/2020 22:28, Doug Anderson wrote:
> Hi,
> 
> On Thu, May 21, 2020 at 8:56 AM Srinivas Kandagatla
> <srinivas.kandagatla@...aro.org> wrote:
>>
>> On 21/05/2020 16:10, Doug Anderson wrote:
>>>> On 20/05/2020 23:48, Doug Anderson wrote:
>>>>>> Is this only applicable for corrected address space?
>>>>> I guess I was proposing a two dts-node / two drive approach here.
>>>>>
>>>>> dts node #1:just covers the memory range for accessing the FEC-corrected data
>>>>> driver #1: read-only and reads the FEC-corrected data
>>>>>
>>>>> dts node #2: covers the memory range that's_not_  the FEC-corrected
>>>>> memory range.
>>>>> driver #2: read-write.  reading reads uncorrected data
>>>>>
>>>>> Does that seem sane?
>>>> I see your point but it does not make sense to have two node for same thing.
>>> OK, so that sounds as if we want to go with the proposal where we
>>> "deprecate the old driver and/or bindings and say that there really
>>> should just be one node and one driver".
>>>
>>> Would this be acceptable to you?
>>>
>>> 1. Officially mark the old bindings as deprecated.
>>
>> Possibly Yes for some reasons below!
>>
>>>
>>> 2. Leave the old driver there to support the old deprecated bindings,
>>> at least until everyone can be transferred over.  There seem to be
>>> quite a few existing users of "qcom,qfprom" and we're supposed to make
>>> an attempt at keeping the old device trees working, at least for a
>>> little while.  Once everyone is transferred over we could decide to
>>> delete the old driver.
>> we could consider "qcom,qfrom" to be only passing corrected address
>> space. Till we transition users to new bindings!
>>
>>>
>> Yes.
>>
>>> 3. We will have a totally new driver here.
>> No, we should still be using the same driver. But the exiting driver
>> seems to incorrect and is need of fixing.
>>
>> Having a look at the memory map for old SoCs like msm8996 and msm8916
>> shows that memory map that was passed to qfprom driver is corrected
>> address space. Writes will not obviously work!
>>
>> This should also be true with sdm845 or sc7180
>>
>> That needs to be fixed first!
> 
> OK, so to summarize:
> 

> 1. We will have one driver: "drivers/nvmem/qfprom.c"

Yes, we should one driver for this because we are dealing with exactly 
same IP.

> 
> 2. If the driver detects that its reg is pointing to the corrected
> address space then it should operate in read-only mode.  Maybe it can
> do this based on the compatible string being just "qcom,qfprom" or
> maybe it can do this based on the size of the "reg".

I found out that there is a version register at offset of 0x6000 which 
can give MAJOR, MINOR and STEP numbers.

So we could still potentially continue using "qcom,qfprom"

The address space can be split into 3 resources, which is inline with 
Specs as well

1. Raw address space ("raw")
2. Configuration address space ("conf" or "core")
3. Corrected address space ("corrected")

Exiting qfprom entries or read-only qfprom  will have "corrected" 
address space which can be the only resource provided by device tree 
entries.
Other two entries("raw" and "conf") are optional.

qfprom: qfprom@...000 {
         compatible = "qcom,qfprom";
	reg = <0 0x00780000 0 0x8ff>,
		<0 0x00782000 0 0x100>,
		<0 0x00784000 0 0x8ff>;
	reg-names = "raw", "conf", "corrected";

	vcc-supply = <&vreg_xyz>;

	clocks = <&gcc GCC_SEC_CTRL_CLK_SRC>;
	clock-names = "secclk";

	assigned-clocks = <&gcc GCC_SEC_CTRL_CLK_SRC>;
         assigned-clock-rates = <19200000>;

	qcom,fuse-blow-frequency = <4800000>

         #address-cells = <1>;
         #size-cells = <1>;

	qusb2p_hstx_trim: hstx-trim-primary@25b {
		reg = <0x25b 0x1>;
		bits = <1 3>;
	};
};

Regarding clk rate setting, the default rate can be set using 
assigned-clock-rates property, however the blow frequency can go as new 
binding.
regarding voltage range for regulator, it should come as part of board 
specific voltage regulator node. In worst case we can discuss on adding 
new bindings for allowing specific range.

for Older SoCs: we still continue to use old style with just one 
resource corresponding to corrected by default.

qfprom: qfprom@...000 {
         compatible = "qcom,qfprom";
         reg = <0 0x00784000 0 0x8ff>;
         #address-cells = <1>;
         #size-cells = <1>;

         qusb2p_hstx_trim: hstx-trim-primary@1eb {
                 reg = <0x1eb 0x1>;
                 bits = <1 4>;
         };

         qusb2s_hstx_trim: hstx-trim-secondary@1eb {
                 reg = <0x1eb 0x2>;
                 bits = <6 4>;
         };
};


I see the patch as adding write support to qfprom, rather than adding 
new driver or new SoC support.

This in summary should give us good direction for this patch!

Correct me if I miss understood something here!


Thanks,
srini

> 
> 3. If that driver sees a newer compatible string (one that includes
> the SoC name in it) it will assume that its "reg" points to the start
> of qfprom space.
> 
> 4. We should post patches to transition all old dts files away from
> the deprecated bindings.
> 
> 
>>> 4. A given device tree will_not_  be allowed to have both
>>> "qcom,qfprom" specified and "qcom,SOC-qfprom" specified.  ...and by
>>> "qcom,SOC-qfprom" I mean that SOC should be replaced by the SoC name,
>>> so "qcom,sc7180-qfprom" or "qcom,sdm845-qfprom".  So once you switch
>>> to the new node it replaces the old node.
>>
>> Secondly, this IP is clearly an integral part of Secure Control Block,
>> which clearly has versioning information.
>>
>> Versioning information should be part of compatible string in msm8996 it
>> should be "qcom,qfprom-5.1.0"
>> for msm8916 it should be "qcom,qfprom-4.0.0" this translates to
>> "qcom,qfprom-<MAJOR-NUMBER>-<MINOR-NUMBER>-<STEP>"
> 
> I don't know much about this versioning info, but I'm curious: can we
> read it from the chip?  If so then it actually _doesn't_ need to be in
> the compatible string, I think.  Device tree shouldn't include things
> that can be probed.  So if this can be probed then maybe we could have
> the compatible as:
> 
> compatible = "qcom,msm8996-qfprom", "qcom,qfprom"
> 
> ...where the SoC is there just in case we need it but we'd expect to
> just match on "qcom,qfprom" and then probe.
> 
> 
> If this can't be probed then having the version info is nice, so then
> I guess you'd have the compatible string:
> 
> compatible = "qcom,msm8996-qfprom", "qcom,qfprom-5.1.0"
> 
> ...where (again) you'd have the SoC specific string there just in case
> but you'd expect that you could just use the generic string.
> 
> 
> Does that sound right?
> 
> 
>> Thirdly we should be able to have common read for all these as they tend
>> to just read from corrected address space.
>>
>> Offsets to corrected address space seems to always constant across SoCs too.
>>
>> platform specific device tree nodes should also be able to specify
>> "read-only" property to not allow writes on to this raw area.
> 
> Yeah, I was thinking we probably wanted a read-only property.  That
> sounds sane to me.
> 
> 
> -Doug
> 

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