linux-kernel - RE: [PATCH v2 0/2] enable spi flash and update is25wp256d page write capabilities

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Date:   Mon, 25 May 2020 05:45:18 +0000
From:   Sagar Kadam <sagar.kadam@...ive.com>
To:     "linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-mtd@...ts.infradead.org" <linux-mtd@...ts.infradead.org>
CC:     Paul Walmsley <paul.walmsley@...ive.com>,
        "palmer@...belt.com" <palmer@...belt.com>,
        "aou@...s.berkeley.edu" <aou@...s.berkeley.edu>,
        "tudor.ambarus@...rochip.com" <tudor.ambarus@...rochip.com>,
        "miquel.raynal@...tlin.com" <miquel.raynal@...tlin.com>,
        "richard@....at" <richard@....at>,
        "vigneshr@...com" <vigneshr@...com>,
        "anup.patel@....com" <anup.patel@....com>
Subject: RE: [PATCH v2 0/2] enable spi flash and update is25wp256d page write
 capabilities

Hi,

A gentle reminder.
Any suggestions here?

BR,
Sagar Kadam

> -----Original Message-----
> From: Sagar Kadam <sagar.kadam@...ive.com>
> Sent: Tuesday, May 19, 2020 4:16 PM
> To: linux-riscv@...ts.infradead.org; linux-kernel@...r.kernel.org; linux-
> mtd@...ts.infradead.org
> Cc: Paul Walmsley <paul.walmsley@...ive.com>; palmer@...belt.com;
> aou@...s.berkeley.edu; tudor.ambarus@...rochip.com;
> miquel.raynal@...tlin.com; richard@....at; vigneshr@...com;
> anup.patel@....com; Sagar Kadam <sagar.kadam@...ive.com>
> Subject: [PATCH v2 0/2] enable spi flash and update is25wp256d page write
> capabilities
> 
> HiFive Unleashed A00 board has is25wp256d snor chip. It is observed that it
> gets configured with Serial Input Page program by the end of spi_nor_scan.
> Using the post bfpt fixup hook we prioritize the page program settings to
> use quad input page program (opcode:0x34) over serial input page program
> (opcode: 0x12).
> 
> The patchset is tested on Linux 5.7.0-rc5.
> 
> Changelog:
> ===============================
> V2:
> -Split common code between is25lp256 and is25wp256 devices as suggested
> Added a generic post bfpt fixup handler that identifies the flash parts
> based on their device id and uses the corresponding fixup. Other device's
> that need a post bfpt fixup can just add the device id check and either
> reuse the available fixups or write the necessary fixup code if one is not
> available.
> 
> V1:
> -Moved SPI_SIFIVE from defconfig to Kconfig.socs for SOC_SIFIVE.
>  Retained it's configurability using "imply" instead of "select"
> 
> V0: Base version patch (Tested on 5.7.0-rc3).
> 
> 
> Sagar Shrikant Kadam (2):
>   riscv: defconfig: enable spi nor on Hifive Unleashed A00
>   spi: nor: update page program settings for is25wp256 using post bfpt
>     fixup
> 
>  arch/riscv/Kconfig.socs      |  1 +
>  arch/riscv/configs/defconfig |  3 +-
>  drivers/mtd/spi-nor/issi.c   | 72
> ++++++++++++++++++++++++++++++++++++--------
>  3 files changed, 63 insertions(+), 13 deletions(-)
> 
> --
> 2.7.4