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Message-ID: <67ac92a2-d37b-d472-3cbc-0bc855235c3f@huawei.com>
Date: Mon, 25 May 2020 14:57:58 +0800
From: Zhenyu Ye <yezhenyu2@...wei.com>
To: Catalin Marinas <catalin.marinas@....com>
CC: <peterz@...radead.org>, <mark.rutland@....com>, <will@...nel.org>,
<aneesh.kumar@...ux.ibm.com>, <akpm@...ux-foundation.org>,
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<yuzhao@...gle.com>, <Dave.Martin@....com>, <steven.price@....com>,
<broonie@...nel.org>, <guohanjun@...wei.com>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <linux-arch@...r.kernel.org>,
<linux-mm@...ck.org>, <arm@...nel.org>, <xiexiangyou@...wei.com>,
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Subject: Re: [PATCH v2 3/6] arm64: Add tlbi_user_level TLB invalidation helper
On 2020/5/22 23:49, Catalin Marinas wrote:
> On Thu, Apr 23, 2020 at 09:56:53PM +0800, Zhenyu Ye wrote:
>> @@ -190,8 +196,8 @@ static inline void flush_tlb_page_nosync(struct vm_area_struct *vma,
>> unsigned long addr = __TLBI_VADDR(uaddr, ASID(vma->vm_mm));
>>
>> dsb(ishst);
>> - __tlbi(vale1is, addr);
>> - __tlbi_user(vale1is, addr);
>> + __tlbi_level(vale1is, addr, 0);
>> + __tlbi_user_level(vale1is, addr, 0);
>> }
>
> This one remains with a level 0 throughout the series. Is this
> intentional? If we can't guarantee the level here, better to use the
> non-level __tlbi().
>
OK, I will change it back to non-level __tlbi().
Thanks,
Zhenyu
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