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Message-ID: <0f58e2fd-ef55-cf38-d403-4782662aa89e@marek.ca>
Date:   Mon, 25 May 2020 06:09:51 -0400
From:   Jonathan Marek <jonathan@...ek.ca>
To:     Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>
Cc:     linux-arm-msm@...r.kernel.org, Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-msm-owner@...r.kernel.org
Subject: Re: [PATCH 2/6] arm64: dts: qcom: sm8250: add apps_smmu node

Hi,

On 5/25/20 5:42 AM, Sai Prakash Ranjan wrote:
> Hi Jonathan,
> 
> On 2020-05-24 08:08, Jonathan Marek wrote:
>> Add the apps_smmu node for sm8250. Note that adding the iommus field for
>> UFS is required because initializing the iommu removes the bypass mapping
>> that created by the bootloader.
>>
> 
> This statement doesn't seem right, you can just say since the bypass is 
> disabled
> by default now, we need to add this property to enable translation and 
> avoid global faults.
> 

If I use this patch [1] then the UFS iommu property isn't needed. In 
downstream, the identity (bypass?) stream mapping is inherited from the 
bootloader, and UFS is used without any iommu property. Setting 
ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=n doesn't make it work on its own 
(without the UFS iommu property), so there's more to it than just 
"bypass is disabled by default now".

https://patchwork.kernel.org/patch/11310757/

>> Signed-off-by: Jonathan Marek <jonathan@...ek.ca>
>> ---
>>  arch/arm64/boot/dts/qcom/sm8250.dtsi | 107 +++++++++++++++++++++++++++
>>  1 file changed, 107 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi
>> b/arch/arm64/boot/dts/qcom/sm8250.dtsi
>> index 2f99c350c287..43c5e48c15e2 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
>> @@ -323,6 +323,8 @@ ufs_mem_hc: ufshc@...4000 {
>>
>>              power-domains = <&gcc UFS_PHY_GDSC>;
>>
>> +            iommus = <&apps_smmu 0x0e0 0>, <&apps_smmu 0x4e0 0>;
>> +
>>              clock-names =
>>                  "core_clk",
>>                  "bus_aggr_clk",
>> @@ -428,6 +430,111 @@ tlmm: pinctrl@...0000 {
>>              wakeup-parent = <&pdc>;
>>          };
>>
>> +        apps_smmu: iommu@...00000 {
>> +            compatible = "qcom,sdm845-smmu-500", "arm,mmu-500";
> 
> This should be qcom,sm8250-smmu-500 and also you need to update the 
> arm-smmu
> binding with this compatible in a separate patch.
> 
> -Sai
> 

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