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Message-ID: <7ad3253d-b581-4833-7e78-2b565b88a75c@infradead.org>
Date:   Wed, 27 May 2020 09:18:41 -0700
From:   Randy Dunlap <rdunlap@...radead.org>
To:     Dilip Kota <eswara.kota@...ux.intel.com>,
        linux-kernel@...r.kernel.org, kishon@...com, vkoul@...nel.org
Cc:     andriy.shevchenko@...el.com, cheol.yong.kim@...el.com,
        qi-ming.wu@...el.com
Subject: Re: [PATCH v2 1/1] phy: intel: Fix compilation error on FIELD_PREP
 usage

On 5/27/20 3:56 AM, Dilip Kota wrote:
> FIELD_PREP expects constant arguments. Istead of doing FIELD_PREP
> operation on the arguments of combo_phy_w32_off_mask(), pass the
> final FIELD_PREP value as an argument.
> 
> Error reported as:
> In file included from include/linux/build_bug.h:5,
> from include/linux/bitfield.h:10,
> from drivers/phy/intel/phy-intel-combo.c:8:
> drivers/phy/intel/phy-intel-combo.c: In function 'combo_phy_w32_off_mask':
> include/linux/bitfield.h:52:28: warning: comparison is always false due to limited range of data type [-Wtype-limits]
> 
> include/linux/compiler.h:350:38: error: call to '__compiletime_assert_37' declared with attribute error: FIELD_PREP: mask is not constant
> 94 |   __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: ");          |   ^~~~~~~~~~~~~~~~
> drivers/phy/intel/phy-intel-combo.c:137:13: note: in expansion of macro 'FIELD_PREP'
> 137 |  reg_val |= FIELD_PREP(mask, val);
> |             ^~~~~~~~~~
> 
> ../include/linux/compiler.h:392:38: error: call to__compiletime_assert_137
>  declared with attribute error:
> BUILD_BUG_ON failed: (((mask) + (1ULL << (__builtin_ffsll(mask) - 1))) & (((mask) + (1ULL << (__builtin_ffsll(mask) - 1))) - 1)) != 0
>   _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
> 
> ../include/linux/bitfield.h:94:3: note: in expansion of macro __BF_FIELD_CHECK
>    __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \
>    ^~~~~~~~~~~~~~~~
> ../drivers/phy/intel/phy-intel-combo.c:137:13: note: in expansion of macro FIELD_PREP
>   reg_val |= FIELD_PREP(mask, val);
>              ^~~~~~~~~~
> 
> Fixes: ac0a95a3ea78 ("phy: intel: Add driver support for ComboPhy")
> Signed-off-by: Dilip Kota <eswara.kota@...ux.intel.com>
> Reported-by: kbuild test robot <lkp@...el.com>
> Reported-by: Randy Dunlap <rdunlap@...radead.org>

Acked-by: Randy Dunlap <rdunlap@...radead.org> # build-tested

Thanks.

> ---
>  drivers/phy/intel/phy-intel-combo.c | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/phy/intel/phy-intel-combo.c b/drivers/phy/intel/phy-intel-combo.c
> index c2a35be4cdfb..254ea7cba7ca 100644
> --- a/drivers/phy/intel/phy-intel-combo.c
> +++ b/drivers/phy/intel/phy-intel-combo.c
> @@ -134,7 +134,7 @@ static inline void combo_phy_w32_off_mask(void __iomem *base, unsigned int reg,
>  
>  	reg_val = readl(base + reg);
>  	reg_val &= ~mask;
> -	reg_val |= FIELD_PREP(mask, val);
> +	reg_val |= val;
>  	writel(reg_val, base + reg);
>  }
>  
> @@ -169,7 +169,7 @@ static int intel_cbphy_pcie_en_pad_refclk(struct intel_cbphy_iphy *iphy)
>  		return 0;
>  
>  	combo_phy_w32_off_mask(cbphy->app_base, PCIE_PHY_GEN_CTRL,
> -			       PCIE_PHY_CLK_PAD, 0);
> +			       PCIE_PHY_CLK_PAD, FIELD_PREP(PCIE_PHY_CLK_PAD, 0));
>  
>  	/* Delay for stable clock PLL */
>  	usleep_range(50, 100);
> @@ -192,7 +192,7 @@ static int intel_cbphy_pcie_dis_pad_refclk(struct intel_cbphy_iphy *iphy)
>  		return 0;
>  
>  	combo_phy_w32_off_mask(cbphy->app_base, PCIE_PHY_GEN_CTRL,
> -			       PCIE_PHY_CLK_PAD, 1);
> +			       PCIE_PHY_CLK_PAD, FIELD_PREP(PCIE_PHY_CLK_PAD, 1));
>  
>  	return 0;
>  }
> @@ -385,7 +385,7 @@ static int intel_cbphy_calibrate(struct phy *phy)
>  
>  	/* trigger auto RX adaptation */
>  	combo_phy_w32_off_mask(cr_base, CR_ADDR(PCS_XF_ATE_OVRD_IN_2, id),
> -			       ADAPT_REQ_MSK, 3);
> +			       ADAPT_REQ_MSK, FIELD_PREP(ADAPT_REQ_MSK, 3));
>  	/* Wait RX adaptation to finish */
>  	ret = readl_poll_timeout(cr_base + CR_ADDR(PCS_XF_RX_ADAPT_ACK, id),
>  				 val, val & RX_ADAPT_ACK_BIT, 10, 5000);
> @@ -396,7 +396,7 @@ static int intel_cbphy_calibrate(struct phy *phy)
>  
>  	/* Stop RX adaptation */
>  	combo_phy_w32_off_mask(cr_base, CR_ADDR(PCS_XF_ATE_OVRD_IN_2, id),
> -			       ADAPT_REQ_MSK, 0);
> +			       ADAPT_REQ_MSK, FIELD_PREP(ADAPT_REQ_MSK, 0));
>  
>  	return ret;
>  }
> 


-- 
~Randy

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