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Message-ID: <20200527012140.GD31696@linux.intel.com>
Date: Tue, 26 May 2020 18:21:40 -0700
From: Sean Christopherson <sean.j.christopherson@...el.com>
To: Maxim Levitsky <mlevitsk@...hat.com>
Cc: kvm@...r.kernel.org, Paolo Bonzini <pbonzini@...hat.com>,
"H. Peter Anvin" <hpa@...or.com>, Tao Xu <tao3.xu@...el.com>,
Jim Mattson <jmattson@...gle.com>,
linux-kernel@...r.kernel.org, Joerg Roedel <joro@...tes.org>,
"maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" <x86@...nel.org>,
Wanpeng Li <wanpengli@...cent.com>,
Ingo Molnar <mingo@...hat.com>,
Thomas Gleixner <tglx@...utronix.de>,
Borislav Petkov <bp@...en8.de>,
Vitaly Kuznetsov <vkuznets@...hat.com>,
Jingqi Liu <jingqi.liu@...el.com>
Subject: Re: [PATCH 2/2] kvm/x86: don't expose MSR_IA32_UMWAIT_CONTROL
unconditionally
On Sat, May 23, 2020 at 07:14:55PM +0300, Maxim Levitsky wrote:
> This msr is only available when the host supports WAITPKG feature.
>
> This breaks a nested guest, if the L1 hypervisor is set to ignore
> unknown msrs, because the only other safety check that the
> kernel does is that it attempts to read the msr and
> rejects it if it gets an exception.
>
> Fixes: 6e3ba4abce KVM: vmx: Emulate MSR IA32_UMWAIT_CONTROL
Same comments on the line wraps and Fixes tag.
For the code:
Reviewed-by: Sean Christopherson <sean.j.christopherson@...el.com>
> Signed-off-by: Maxim Levitsky <mlevitsk@...hat.com>
> ---
> arch/x86/kvm/x86.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index b226fb8abe41b..4752293312947 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -5316,6 +5316,10 @@ static void kvm_init_msr_list(void)
> min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
> continue;
> break;
> + case MSR_IA32_UMWAIT_CONTROL:
> + if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
> + continue;
> + break;
> default:
> break;
> }
> --
> 2.26.2
>
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